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DFU-E: A Dataflow Architecture for Edge DSP and AI Applications 期刊论文
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2025, 卷号: 36, 期号: 6, 页码: 1100-1114
作者:  Li, Wenming;  Fan, Zhihua;  Liu, Tianyu;  Wang, Zhen;  Wu, Haibin;  Wu, Meng;  Zhang, Kunming;  Liu, Yanhuan;  Sun, Ninghui;  Ye, Xiaochun;  Fan, Dongrui
收藏  |  浏览/下载：5/0  |  提交时间：2025/06/25
Artificial intelligence  Hardware  Edge computing  Computer architecture  Computational modeling  Single instruction multiple data  Energy efficiency  Target recognition  Radar polarimetry  Real-time systems  Dataflow architecture  edge computing  digital signal processing  AI  multi-layer dataflow mechanism  
PIMCOMP: An End-to-End DNN Compiler for Processing-In-Memory Accelerators 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 5, 页码: 1745-1759
作者:  Sun, Xiaotian;  Wang, Xinyu;  Li, Wanqian;  Han, Yinhe;  Chen, Xiaoming
收藏  |  浏览/下载：5/0  |  提交时间：2025/06/25
Hardware  Optimization  Artificial neural networks  Pipelines  Parallel processing  Biological system modeling  Resource management  Adaptation models  Scheduling  Memory management  Deep neural network (DNN)  end-to-end compiler  processing-in-memory (PIM) accelerator  system-level optimization  
Trident: The Acceleration Architecture for High-Performance Private Set Intersection 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2025, 卷号: 74, 期号: 4, 页码: 1152-1167
作者:  Zhang, Jinkai;  Yang, Yinghao;  Zhou, Zhe;  Hu, Zhicheng;  Zhao, Xin;  Chang, Liang;  Lu, Hang;  Li, Xiaowei
收藏  |  浏览/下载：4/0  |  提交时间：2025/06/25
Protocols  Receivers  Cryptography  Hardware  Central Processing Unit  Random access memory  Data privacy  Polynomials  Field programmable gate arrays  Computer architecture  Private set intersection (PSI)  fully homomorphic encryption (FHE)  FPGA accelerator  privacy computing  
A Data-Centric Software-Hardware Co-Designed Architecture for Large-Scale Graph Processing 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2025, 卷号: 74, 期号: 4, 页码: 1109-1122
作者:  Li, Zerun;  Chen, Xiaoming;  Yang, Yuxin;  Min, Feng;  Zhang, Xiaoyu;  Han, Yinhe
收藏  |  浏览/下载：6/0  |  提交时间：2025/06/25
Bandwidth  Memory management  Computational modeling  System-on-chip  Software  Hardware  Computer architecture  Three-dimensional displays  Performance evaluation  Data communication  Large-scale graph processing  near memory computing  memory system  accelerator  
Harmonia: A Unified Architecture for Efficient Deep Symbolic Regression 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 2, 页码: 737-750
作者:  Ma, Tianyun;  Wen, Yuanbo;  Song, Xinkai;  Jin, Pengwei;  Huang, Di;  Han, Husheng;  Nan, Ziyuan;  Yu, Zhongkai;  Peng, Shaohui;  Zhao, Yongwei;  Chen, Huaping;  Du, Zidong;  Hu, Xing;  Guo, Qi
收藏  |  浏览/下载：6/0  |  提交时间：2025/06/25
Skeleton  Optimization  Graphics processing units  Vectors  Hardware  Artificial neural networks  Accuracy  Deep symbolic regression (DSR)  radial basis function network (RBFN)  transcendental functions  unified array  
RIVL: A Low-Cost SoC Agile Development Platform for Multiple RISC-V Processors Design and Verification 期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2024, 页码: 11
作者:  Xu, Lida;  Cao, Zewen;  Zhao, Hualong;  Peng, Zhuo;  Miao, Yuchi;  Zhuang, Chunan;  Ruan, Hongrui;  Dong, Yuying;  Zeng, Chuanbin;  Li, Bo;  Luo, Jiajun
收藏  |  浏览/下载：5/0  |  提交时间：2025/06/25
Program processors  Hardware  Chip scale packaging  Design methodology  Costs  Object oriented modeling  Complexity theory  Testing  Registers  Prototypes  Agile methodology  object-oriented hardware  RISC-V  low-cost  integration  verification  open source  
Mentor: A Memory-Efficient Sparse-dense Matrix Multiplication Accelerator Based on Column-Wise Product 期刊论文
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2024, 卷号: 21, 期号: 4, 页码: 25
作者:  Lu, Xiaobo;  Fang, Jianbin;  Peng, Lin;  Huang, Chun;  Du, Zidong;  Zhao, Yongwei;  Wang, Zheng
收藏  |  浏览/下载：2/0  |  提交时间：2025/06/25
Hardware  Hardware accelerators  Computer systems organization  Architectures  
Advancements in Accelerating Deep Neural Network Inference on AIoT Devices: A Survey 期刊论文
IEEE TRANSACTIONS ON SUSTAINABLE COMPUTING, 2024, 卷号: 9, 期号: 6, 页码: 830-847
作者:  Cheng, Long;  Gu, Yan;  Liu, Qingzhi;  Yang, Lei;  Liu, Cheng;  Wang, Ying
收藏  |  浏览/下载：6/0  |  提交时间：2025/06/25
Computational modeling  Hardware  Artificial neural networks  Optimization  Internet of Things  Adaptation models  Data models  AIoT devices  DNN inference  model compression  parallel computing  performance optimization  survey  
Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic Accelerators 期刊论文
IEEE DESIGN & TEST, 2024, 卷号: 41, 期号: 5, 页码: 46-54
作者:  Liu, Rui;  Li, Zerun;  Zhang, Xiaoyu;  Li, Wanqian;  Shen, Libo;  Tang, Rui;  Luo, Zhejian;  Chen, Xiaoming;  Han, Yinhe;  Tang, Minghua
收藏  |  浏览/下载：12/0  |  提交时间：2024/12/06
Computer architecture  Cryptography  Optimization  Table lookup  Hardware acceleration  Resource management  Space exploration  Computing-in-memory  electronic design automation  cryptographic algorithm  automatic generation  
On Modeling and Detecting Trojans in Instruction Sets 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 10, 页码: 3226-3239
作者:  Zhang, Ying;  He, Aodi;  Li, Jiaying;  Rezine, Ahmed;  Peng, Zebo;  Larsson, Erik;  Yang, Tao;  Jiang, Jianhui;  Li, Huawei
收藏  |  浏览/下载：14/0  |  提交时间：2024/12/06
Trojan horses  Security  Program processors  Companies  Inspection  Hardware security  Reverse engineering  Deep test for security  hidden instruction Trojan (HIT)  unbounded model checking (UMC)  VLSI test