CSpace

浏览/检索结果: 共3条,第1-3条 帮助

已选(0)清除 条数/页:   排序方式:
RIVL: A Low-Cost SoC Agile Development Platform for Multiple RISC-V Processors Design and Verification 期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2024, 页码: 11
作者:  Xu, Lida;  Cao, Zewen;  Zhao, Hualong;  Peng, Zhuo;  Miao, Yuchi;  Zhuang, Chunan;  Ruan, Hongrui;  Dong, Yuying;  Zeng, Chuanbin;  Li, Bo;  Luo, Jiajun
收藏  |  浏览/下载:1/0  |  提交时间:2025/06/25
Program processors  Hardware  Chip scale packaging  Design methodology  Costs  Object oriented modeling  Complexity theory  Testing  Registers  Prototypes  Agile methodology  object-oriented hardware  RISC-V  low-cost  integration  verification  open source  
Physical Design Methodology for Godson-2G Microprocessor 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2010, 卷号: 25, 期号: 2, 页码: 225-231
作者:  Zhao, Ji-Ye;  Liu, Dong;  Huan, Dan-Dan;  Su, Meng-Hao;  Xiao, Bin;  Xu, Ying;  Shi, Feng;  Chen, Chen;  Wang, Song
收藏  |  浏览/下载:75/0  |  提交时间:2019/12/16
computer architecture  Godson-2G  physical design methodology  nanometer process  
Physical Implementation of the 1GHz Godson-3 Quad-Core Microprocessor 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2010, 卷号: 25, 期号: 2, 页码: 192-199
作者:  Fan, Bao-Xia;  Yang, Liang;  Wang, Jiang-Mei;  Wang, Ru;  Xiao, Bin;  Xu, Ying;  Liu, Dong;  Zhao, Ji-Ye
收藏  |  浏览/下载:71/0  |  提交时间:2019/12/16
physical implementation  design methodology  on-chip variation (OCV)  low power  clock tree