中国科学院计算技术研究所机构知识库

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	VANUCA: Enabling Near-Threshold Voltage Operation in Large-Capacity Cache 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 3, 页码: 858-870 作者:  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：40/0  |  提交时间：2019/12/13 Cache design  fault tolerant  multi-V-dd  near-threshold voltage (NTV)  nonuniform cache access (NUCA)
	ReviveNet: A Self-Adaptive Architecture for Improving Lifetime Reliability via Localized Timing Adaptation 期刊论文 IEEE TRANSACTIONS ON COMPUTERS, 2011, 卷号: 60, 期号: 9, 页码: 1219-1232 作者:  Yan, Guihai;  Han, Yinhe;  Li, Xiaowei 收藏  |  浏览/下载：69/0  |  提交时间：2019/12/16 Lifetime reliability  self-adaptive  aging sensor  timing adaptation  NBTI
	Statistical lifetime reliability optimization considering joint effect of process variation and aging 期刊论文 INTEGRATION-THE VLSI JOURNAL, 2011, 卷号: 44, 期号: 3, 页码: 185-191 作者:  Jin, Song;  Han, Yinhe;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：72/0  |  提交时间：2019/12/16 Lifetime reliability  Process variation  NBTI  Duty cycle  Gate sizing
	A New Multiple-Round Dimension-Order Routing for Networks-on-Chip 期刊论文 IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2011, 卷号: E94D, 期号: 4, 页码: 809-821 作者:  Fu, Binzhang;  Han, Yinhe;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：75/0  |  提交时间：2019/12/16 network-on-chip (NoC)  fault-tolerant routing  multiple round dimension-order routing  turn model
	MicroFix: Using Timing Interpolation and Delay Sensors for Power Reduction 期刊论文 ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2011, 卷号: 16, 期号: 2, 页码: 21 作者:  Yan, Guihai;  Han, Yinhe;  Liu, Hui;  Liang, Xiaoyao;  Li, Xiaowei 收藏  |  浏览/下载：70/0  |  提交时间：2019/12/16 Design  Performance  Reliability  Power reduction  fine-grained adaptability  DVFS  timing interpolation  delay sensor
	Performance-asymmetry-aware scheduling for Chip Multiprocessors with static core coupling 期刊论文 JOURNAL OF SYSTEMS ARCHITECTURE, 2010, 卷号: 56, 期号: 10, 页码: 534-542 作者:  Dong, Jianbo;  Zhang, Lei;  Han, Yinhe;  Yan, Guihai;  Li, Xiaowei 收藏  |  浏览/下载：50/0  |  提交时间：2019/12/16 Process variation  Thread-level redundancy  Chip Multiprocessor  Scheduling