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On Modeling and Detecting Trojans in Instruction Sets 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 10, 页码: 3226-3239
作者:  Zhang, Ying;  He, Aodi;  Li, Jiaying;  Rezine, Ahmed;  Peng, Zebo;  Larsson, Erik;  Yang, Tao;  Jiang, Jianhui;  Li, Huawei
收藏  |  浏览/下载:1/0  |  提交时间:2024/12/06
Trojan horses  Security  Program processors  Companies  Inspection  Hardware security  Reverse engineering  Deep test for security  hidden instruction Trojan (HIT)  unbounded model checking (UMC)  VLSI test  
Scalable and Conflict-Free NTT Hardware Accelerator Design: Methodology, Proof, and Implementation 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 5, 页码: 1504-1517
作者:  Mu, Jianan;  Ren, Yi;  Wang, Wen;  Hu, Yizhong;  Chen, Shuai;  Chang, Chip-Hong;  Fan, Junfeng;  Ye, Jing;  Cao, Yuan;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:19/0  |  提交时间:2023/12/04
Memory access pattern  number theoretic transform (NTT)  post-quantum cryptography (PQC)  scalable hardware design  
Parallel Software-Based Self-Testing with Bounded Model Checking for Kilo-Core Networks-on-Chip 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2023, 卷号: 38, 期号: 2, 页码: 405-421
作者:  Zhang, Ying;  Ji, Peng-Fei;  Zhu, Pan-Wei;  Peng, Zebo;  Li, Hua-Wei;  Jiang, Jian-Hui
收藏  |  浏览/下载:22/0  |  提交时间:2023/12/04
software-based self-testing (SBST)  parallel test  kilo-core networks-on-chip (NoCs)  online testing  
On-Line Fault Protection for ReRAM-Based Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2023, 卷号: 72, 期号: 2, 页码: 423-437
作者:  Li, Wen;  Wang, Ying;  Liu, Cheng;  He, Yintao;  Liu, Lian;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:23/0  |  提交时间:2023/07/12
Training  Fault detection  Computational modeling  Image edge detection  Memristors  Neural networks  Kernel  Deep neural network  hard fault  ReRAM  reliability  soft fault  
HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 10, 页码: 3400-3413
作者:  Liu, Cheng;  Chu, Cheng;  Xu, Dawen;  Wang, Ying;  Wang, Qianlong;  Li, Huawei;  Li, Xiaowei;  Cheng, Kwang-Ting
收藏  |  浏览/下载:37/0  |  提交时间:2022/12/07
Circuit faults  Computational modeling  Deep learning  Hardware  Redundancy  Neural networks  Computer architecture  Deep learning accelerator (DLA)  fault detection  fault tolerance  hybrid computing architecture (HyCA)  
An Efficient Deep Learning Accelerator Architecture for Compressed Video Analysis 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 9, 页码: 2808-2820
作者:  Wang, Yongchen;  Wang, Ying;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:40/0  |  提交时间:2022/12/07
Streaming media  Neural networks  Image coding  Decoding  Metadata  Deep learning  Hardware  Neural network acceleration  specialized accelerator  video analysis  
DHSA: efficient doubly homomorphic secure aggregation for cross-silo federated learning 期刊论文
JOURNAL OF SUPERCOMPUTING, 2022, 页码: 31
作者:  Liu, Zizhen;  Chen, Si;  Ye, Jing;  Fan, Junfeng;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:26/0  |  提交时间:2022/12/07
Federated learning  Security  Efficient  Homomorphic  
Saving Energy of RRAM-Based Neural Accelerator Through State-Aware Computing 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 7, 页码: 2115-2127
作者:  He, Yintao;  Wang, Ying;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:39/0  |  提交时间:2022/12/07
Computer architecture  Microprocessors  Resistance  Power demand  Training  Biological neural networks  Optimization  Low power (LP)  neural networks  processing-in-memory  resistive random-access memory (RRAM)  
CAP: Communication-Aware Automated Parallelization for Deep Learning Inference on CMP Architectures 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2022, 卷号: 71, 期号: 7, 页码: 1626-1639
作者:  Zou, Kaiwei;  Wang, Ying;  Cheng, Long;  Qu, Songyun;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:38/0  |  提交时间:2022/12/07
Kernel  Computer architecture  Multicore processing  Deep learning  System-on-chip  Parallel processing  Real-time systems  Neural networks  parallel processing  real-time and embedded systems  single-chip multiprocessors  reinforcement learning  structured sparsity  
Taming Process Variations in CNFET for Efficient Last-Level Cache Design 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2022, 卷号: 30, 期号: 4, 页码: 418-431
作者:  Xu, Dawen;  Feng, Zhuangyu;  Liu, Cheng;  Li, Li;  Wang, Ying;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:34/0  |  提交时间:2022/12/07
CNTFETs  Delays  Transistors  Layout  Very large scale integration  Radio frequency  Energy consumption  nanotube field-effect transistor (CNFET)  last-level cache (LLC)  process variation (PV)  variation-aware cache