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Trident: The Acceleration Architecture for High-Performance Private Set Intersection 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2025, 卷号: 74, 期号: 4, 页码: 1152-1167
作者:  Zhang, Jinkai;  Yang, Yinghao;  Zhou, Zhe;  Hu, Zhicheng;  Zhao, Xin;  Chang, Liang;  Lu, Hang;  Li, Xiaowei
收藏  |  浏览/下载：4/0  |  提交时间：2025/06/25
Protocols  Receivers  Cryptography  Hardware  Central Processing Unit  Random access memory  Data privacy  Polynomials  Field programmable gate arrays  Computer architecture  Private set intersection (PSI)  fully homomorphic encryption (FHE)  FPGA accelerator  privacy computing  
General Purpose Deep Learning Accelerator Based on Bit Interleaving 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 5, 页码: 1470-1483
作者:  Chang, Liang;  Lu, Hang;  Li, Chenglong;  Zhao, Xin;  Hu, Zhicheng;  Zhou, Jun;  Li, Xiaowei
收藏  |  浏览/下载：26/0  |  提交时间：2024/12/06
Synchronization  Parallel processing  Computational modeling  Training  Pragmatics  Power demand  Hardware acceleration  Accelerator  bit-level sparsity  deep neural network (DNN)  
Bi-STAN: bilinear spatial-temporal attention network for wearable human activity recognition 期刊论文
INTERNATIONAL JOURNAL OF MACHINE LEARNING AND CYBERNETICS, 2023, 页码: 17
作者:  Gao, Chenlong;  Chen, Yiqiang;  Jiang, Xinlong;  Hu, Lisha;  Zhao, Zhicheng;  Zhang, Yuxin
收藏  |  浏览/下载：44/0  |  提交时间：2023/07/12
Human activity recognition  Spatial-temporal attention  Bilinear pooling  Low-redundancy