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Chiplever: A Hardware-Software Co-Design Framework Toward Extension of Chiplet System for Fully Homomorphic Encryption 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2026, 卷号: 45, 期号: 2, 页码: 603-616
作者:  Du, Yibo;  Wang, Ying;  Wang, Mengdi;  Li, Xiaowei;  Han, Yinhe
收藏  |  浏览/下载：0/0  |  提交时间：2026/05/25
Hardware  Chiplets  Homomorphic encryption  Polynomials  Vectors  Scheduling algorithms  Noise  Program processors  Design automation  Computational efficiency  Chiplet  fully homomorphic encryption (FHE)  hardware-software co-design  heterogeneous architecture  
A data-centric chip design agent framework for Verilog code generation 期刊论文
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2025, 卷号: 30, 期号: 6, 页码: 27
作者:  Chang, Kaiyan;  Zhu, Wenlong;  Wang, Kun;  He, Xinyang;  Yang, Nan;  Chen, Zhirong;  Jin, Dantong;  Li, Cangyuan;  Zhou, Yunhao;  Yan, Hao;  Zhao, Zhuoliang;  Cheng, Yuan;  Wang, Mengdi;  Liang, Shengwen;  Han, Yinhe;  Li, Xiaowei;  Li, Huawei;  Wang, Ying
收藏  |  浏览/下载：1/0  |  提交时间：2026/05/25
Large language model  hardware generation  data augmentation  
AutoSilicon: Scaling Up RTL Design Generation Capability of Large Language Models 期刊论文
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2025, 卷号: 30, 期号: 6, 页码: 21
作者:  Li, Cangyuan;  Chen, Chujie;  Pan, Yudong;  Xu, Wenjun;  Liu, Yiqi;  Chang, Kaiyan;  Wang, Yujie;  Wang, Mengdi;  Li, Huawei;  Han, Yinhe;  Wang, Ying
收藏  |  浏览/下载：0/0  |  提交时间：2026/05/25
Verilog code generation  LLM  agent  verilog  
DNA: A General Dynamic Neural Network Accelerator 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2025, 卷号: 74, 期号: 9, 页码: 3210-3222
作者:  Liu, Lian;  Yu, Jinxin;  Wang, Mengdi;  Li, Xiaowei;  Han, Yinhe;  Wang, Ying
收藏  |  浏览/下载：20/0  |  提交时间：2025/12/03
Dynamic scheduling  Artificial neural networks  DNA  Processor scheduling  Loading  Prefetching  Runtime  Costs  Switches  Optimization  Dynamic NN  NPU design  accelerator