中文版 | English

在结果中检索

CSpace

浏览/检索结果: 共27条，第1-10条 帮助

已选(0)清除 条数/页：   排序方式：
DFGAS: Exploring the Balance of HW-SW Scheduling through the DFG-Aware Scheme 期刊论文
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2025, 卷号: 22, 期号: 4, 页码: 26
作者:  Liu, Tianyu;  Fan, Zhihua;  Li, Wenming;  Wang, Zhen;  Qiu, Yuhang;  Tang, Shengzhong;  Wu, Haibin;  Liu, Yanhuan;  Ye, Xiaochun;  Fan, Dongrui
收藏  |  浏览/下载：2/0  |  提交时间：2026/05/25
CGRA  hardware-software co-design  network-on-chip  
Compressing and Accelerating Sparse CNNs Using Sign-Reserved Toeplitz Filters and Input Activation Density-aware Dataflow 期刊论文
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2025, 卷号: 22, 期号: 4, 页码: 23
作者:  Wang, Zhen;  Liu, Tianyu;  Fan, Zhihua;  Li, Wenming;  Qiu, Yuhang;  Zhang, Zhiyuan;  An, Xuejun;  Fan, Dongrui;  Ye, Xiaochun
收藏  |  浏览/下载：1/0  |  提交时间：2026/05/25
Convolutional neural networks  accelerators  sparsity  algorithm-hardware co-design  
A RISC-V Extended Infrastructure for CNNs Through Pipelined Computing and Data Dependence Optimization 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 11, 页码: 4141-4154
作者:  Luo, Teng;  Xia, Tengfei;  Chen, Jiayuan;  Fan, Zhihua;  Li, Wenming;  Mu, Yudong;  An, Xuejun;  Ye, Xiaochun;  Fan, Dongrui
收藏  |  浏览/下载：24/0  |  提交时间：2025/12/03
Artificial intelligence  Convolution  Convolutional neural networks  Computer architecture  Computational efficiency  Pipelines  Logic  Filters  Fans  Biological system modeling  Convolutional neural networks (CNNs) acceleration  dataflow optimization  pipelined computing  RISC-V extended instructions  
GenCNN: A Partition-Aware Multi-Objective Mapping Framework for CNN Accelerators Based on Genetic Algorithm 期刊论文
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2025, 卷号: 22, 期号: 3, 页码: 26
作者:  Mu, Yudong;  Fan, Zhihua;  Li, Wenming;  Zhang, Zhiyuan;  An, Xuejun;  Fan, Dongrui;  Ye, Xiaochun
收藏  |  浏览/下载：21/0  |  提交时间：2025/12/03
CNN Accelerator  Dataflow Graph Mapping  Genetic Algorithm  Multi-objective Optimization  
CODA: A Computation-Driven Paradigm for Sparse DNN Acceleration 期刊论文
IEEE COMPUTER ARCHITECTURE LETTERS, 2025, 卷号: 24, 期号: 2, 页码: 381-384
作者:  Liu, Yanhuan;  Li, Wenming;  Zhang, Kunming;  Liu, Tianyu;  Ye, Xiaochun;  An, Xuejun
收藏  |  浏览/下载：0/0  |  提交时间：2026/05/25
Software  Hardware  Computational modeling  Sparse matrices  Pipelines  Indexes  Data models  Spatial databases  Computational efficiency  Vectors  Computation-driven architecture  sparse DNN acceleration  dataflow paradigm  unstructured sparsity  work tokenizer  dynamic execution core  asynchronous execution  
DFU-E: A Dataflow Architecture for Edge DSP and AI Applications 期刊论文
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2025, 卷号: 36, 期号: 6, 页码: 1100-1114
作者:  Li, Wenming;  Fan, Zhihua;  Liu, Tianyu;  Wang, Zhen;  Wu, Haibin;  Wu, Meng;  Zhang, Kunming;  Liu, Yanhuan;  Sun, Ninghui;  Ye, Xiaochun;  Fan, Dongrui
收藏  |  浏览/下载：66/0  |  提交时间：2025/06/25
Artificial intelligence  Hardware  Edge computing  Computer architecture  Computational modeling  Single instruction multiple data  Energy efficiency  Target recognition  Radar polarimetry  Real-time systems  Dataflow architecture  edge computing  digital signal processing  AI  multi-layer dataflow mechanism  
PANDA: Adaptive Prefetching and Decentralized Scheduling for Dataflow Architectures 期刊论文
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2025, 卷号: 22, 期号: 2, 页码: 27
作者:  Qin, Shantian;  Fan, Zhihua;  Li, Wenming;  Wang, Zhen;  An, Xuejun;  Ye, Xiaochun;  Fan, Dongrui
收藏  |  浏览/下载：24/0  |  提交时间：2025/12/03
Prefetching  decentralized dynamic scheduling  reconfigurable on-chip memory architecture  
Accelerating tensor multiplication by exploring hybrid product with hardware and software co-design 期刊论文
JOURNAL OF SYSTEMS ARCHITECTURE, 2025, 卷号: 159, 页码: 16
作者:  Zhang, Zhiyuan;  Fan, Zhihua;  Li, Wenming;  Qiu, Yuhang;  Wang, Zhen;  Ye, Xiaochun;  Fan, Dongrui;  An, Xuejun
收藏  |  浏览/下载：27/0  |  提交时间：2025/06/25
Tensor multiplication  Hybrid product  Dataflow  Accelerator  
HiHGNN: Accelerating HGNNs Through Parallelism and Data Reusability Exploitation 期刊论文
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2024, 卷号: 35, 期号: 7, 页码: 1122-1138
作者:  Xue, Runzhen;  Han, Dengke;  Yan, Mingyu;  Zou, Mo;  Yang, Xiaocheng;  Wang, Duo;  Li, Wenming;  Tang, Zhimin;  Kim, John;  Ye, Xiaochun;  Fan, Dongrui
收藏  |  浏览/下载：74/0  |  提交时间：2024/12/06
Semantics  Parallel processing  Graph neural networks  Vectors  Graphics processing units  Fuses  Hardware  GNN  GNN accelerator  graph neural network  HGNN  HGNN accelerator  heterogeneous graph neural network  
MoDSE: A High-Accurate Multiobjective Design Space Exploration Framework for CPU Microarchitectures 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 5, 页码: 1525-1537
作者:  Wang, Duo;  Yan, Mingyu;  Teng, Yihan;  Han, Dengke;  Liu, Xin;  Li, Wenming;  Ye, Xiaochun;  Fan, Dongrui
收藏  |  浏览/下载：67/0  |  提交时间：2024/12/06
Pareto optimization  Predictive models  Measurement  Space exploration  Prediction algorithms  Central Processing Unit  Microarchitecture  CPU microarchitecture  design space exploration (DSE)  multiobjective exploration  Pareto hypervolume  prediction model