中国科学院计算技术研究所机构知识库

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发表日期：2022

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	Secured Data Transmission Over Insecure Networks-on-Chip by Modulating Inter-Packet Delays 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 11, 页码: 4313-4324 作者:  Xu, Jiaen;  Wang, Xiaohang;  Jiang, Yingtao;  Singh, Amit Kumar;  Gu, Chongyan;  Huang, Letian;  Yang, Mei;  Li, Shunbin 收藏  |  浏览/下载：13/0  |  提交时间：2023/07/12 Block coding  inter-packet delay  network-on-chip (NoC)  secure channel
	HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 10, 页码: 3400-3413 作者:  Liu, Cheng;  Chu, Cheng;  Xu, Dawen;  Wang, Ying;  Wang, Qianlong;  Li, Huawei;  Li, Xiaowei;  Cheng, Kwang-Ting 收藏  |  浏览/下载：25/0  |  提交时间：2022/12/07 Circuit faults  Computational modeling  Deep learning  Hardware  Redundancy  Neural networks  Computer architecture  Deep learning accelerator (DLA)  fault detection  fault tolerance  hybrid computing architecture (HyCA)
	Saving Energy of RRAM-Based Neural Accelerator Through State-Aware Computing 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 7, 页码: 2115-2127 作者:  He, Yintao;  Wang, Ying;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：27/0  |  提交时间：2022/12/07 Computer architecture  Microprocessors  Resistance  Power demand  Training  Biological neural networks  Optimization  Low power (LP)  neural networks  processing-in-memory  resistive random-access memory (RRAM)
	CAP: Communication-Aware Automated Parallelization for Deep Learning Inference on CMP Architectures 期刊论文 IEEE TRANSACTIONS ON COMPUTERS, 2022, 卷号: 71, 期号: 7, 页码: 1626-1639 作者:  Zou, Kaiwei;  Wang, Ying;  Cheng, Long;  Qu, Songyun;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：29/0  |  提交时间：2022/12/07 Kernel  Computer architecture  Multicore processing  Deep learning  System-on-chip  Parallel processing  Real-time systems  Neural networks  parallel processing  real-time and embedded systems  single-chip multiprocessors  reinforcement learning  structured sparsity
	A Low-Cost FPGA Implementation of Spiking Extreme Learning Machine With On-Chip Reward-Modulated STDP Learning 期刊论文 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2022, 卷号: 69, 期号: 3, 页码: 1657-1661 作者:  He, Zhen;  Shi, Cong;  Wang, Tengxiao;  Wang, Ying;  Tian, Min;  Zhou, Xichuan;  Li, Ping;  Liu, Liyuan;  Wu, Nanjian;  Luo, Gang 收藏  |  浏览/下载：24/0  |  提交时间：2022/12/07 Neurons  Hardware  System-on-chip  Costs  Training  Field programmable gate arrays  Computational modeling  Neuromorphic computing  spiking neural network  extreme learning machine  spike-timing-dependent plasticity  reward-modulated  on-chip learning
	Cambricon-G: A Polyvalent Energy-Efficient Accelerator for Dynamic Graph Neural Networks 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 1, 页码: 116-128 作者:  Song, Xinkai;  Zhi, Tian;  Fan, Zhe;  Zhang, Zhenxing;  Zeng, Xi;  Li, Wei;  Hu, Xing;  Du, Zidong;  Guo, Qi;  Chen, Yunji 收藏  |  浏览/下载：29/0  |  提交时间：2022/06/21 Accelerator  architecture  graph neural networks (GNNs)