中国科学院计算技术研究所机构知识库

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限定条件	发表日期：2016    资助项目：National Natural Science Foundation of China[61221062]

已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择期刊影响因子升序期刊影响因子降序发表日期升序发表日期降序提交时间升序提交时间降序作者升序作者降序WOS被引频次升序WOS被引频次降序题名升序题名降序
	Predicting Cross-Core Performance Interference on Multicore Processors with Regression Analysis 期刊论文 IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2016, 卷号: 27, 期号: 5, 页码: 1443-1456 作者:  Zhao, Jiacheng;  Cui, Huimin;  Xue, Jingling;  Feng, Xiaobing 收藏  |  浏览/下载：38/0  |  提交时间：2019/12/13 Cross-core performance interference  memory subsystems  multicore processors  performance analysis  prediction model
	Wide Operational Range Processor Power Delivery Design for Both Super-Threshold Voltage and Near-Threshold Voltage Computing 期刊论文 JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2016, 卷号: 31, 期号: 2, 页码: 253-266 作者:  He, Xin;  Yan, Gui-Hai;  Han, Yin-He;  Li, Xiao-Wei 收藏  |  浏览/下载：53/0  |  提交时间：2019/12/13 voltage regulator  power delivery  near-threshold computing  multicore processor
	A Robust Energy/Area-Efficient Forwarded-Clock Receiver With All-Digital Clock and Data Recovery in 28-nm CMOS for High-Density Interconnects 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 2, 页码: 578-586 作者:  Chen, Shuai;  Li, Hao;  Chiang, Patrick Yin 收藏  |  浏览/下载：38/0  |  提交时间：2019/12/13 All-digital clock and data recovery (ADCDR)  delay-locked loop (DLL)  forwarded-clock (FC) receiver  high-density interconnect  jitter tolerance  multicore processor  process variation  voltage and temperature drift