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BitXpro: Regularity-Aware Hardware Runtime Pruning for Deep Neural Networks 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2023, 卷号: 31, 期号: 1, 页码: 90-103
作者:  Li, Hongyan;  Lu, Hang;  Wang, Haoxuan;  Deng, Shengji;  Li, Xiaowei
收藏  |  浏览/下载：13/0  |  提交时间：2023/07/12
Deep learning accelerator  deep neural network (DNN)  hardware runtime pruning  
Saving Energy of RRAM-Based Neural Accelerator Through State-Aware Computing 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 7, 页码: 2115-2127
作者:  He, Yintao;  Wang, Ying;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：28/0  |  提交时间：2022/12/07
Computer architecture  Microprocessors  Resistance  Power demand  Training  Biological neural networks  Optimization  Low power (LP)  neural networks  processing-in-memory  resistive random-access memory (RRAM)  
A Fast Precision Tuning Solution for Always-On DNN Accelerators 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 5, 页码: 1236-1248
作者:  Wang, Ying;  He, Yintao;  Cheng, Long;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：25/0  |  提交时间：2022/12/07
Computer architecture  Neural networks  Computational modeling  Approximate computing  Tuning  Switches  Microprocessors  Always-on  CNN  computing-in-memory (CiM)  resistive RAM  
Architecting Effectual Computation for Machine Learning Accelerators 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 10, 页码: 2654-2667
作者:  Lu, Hang;  Zhang, Mingzhe;  Han, Yinhe;  Wang, Qi;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：88/0  |  提交时间：2020/12/10
Computational modeling  Throughput  Adders  Machine learning  Acceleration  Kernel  Computational efficiency  Accelerator architectures  neural network hardware  multiplying circuits  
ShuttleNoC: Power-Adaptable Communication Infrastructure for Many-Core Processors 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2019, 卷号: 38, 期号: 8, 页码: 1438-1451
作者:  Lu, Hang;  Chang, Yisong;  Yan, Guihai;  Lin, Ning;  Wei, Xin;  Li, Xiaowei
收藏  |  浏览/下载：75/0  |  提交时间：2019/12/10
Many-core processors  networks-on-chip (NoCs)  power management  shuttle networks-on-chip (ShuttleNoC)  
A Case of On-Chip Memory Subsystem Design for Low-Power CNN Accelerators 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2018, 卷号: 37, 期号: 10, 页码: 1971-1984
作者:  Wang, Ying;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：68/0  |  提交时间：2019/12/10
Convolutional neural network (CNN)  deep learning  low power  memory subsystem  
MicroFix: Using Timing Interpolation and Delay Sensors for Power Reduction 期刊论文
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2011, 卷号: 16, 期号: 2, 页码: 21
作者:  Yan, Guihai;  Han, Yinhe;  Liu, Hui;  Liang, Xiaoyao;  Li, Xiaowei
收藏  |  浏览/下载：65/0  |  提交时间：2019/12/16
Design  Performance  Reliability  Power reduction  fine-grained adaptability  DVFS  timing interpolation  delay sensor  
X-Filling for Simultaneous Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2010, 卷号: 18, 期号: 7, 页码: 1081-1092
作者:  Li, Jia;  Xu, Qiang;  Hu, Yu;  Li, Xiaowei
收藏  |  浏览/下载：38/0  |  提交时间：2019/12/16
At-speed scan-based testing  low-power testing  X-filling