中国科学院计算技术研究所机构知识库

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限定条件	作者：Li, Xiaowei    第一作者    专题：中国科学院计算技术研究所期刊论文    第一作者的第一单位    第一作者单位    通讯作者单位

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	Thread: Towards fine-grained precision reconfiguration in variable-precision neural network accelerator 期刊论文 IEICE ELECTRONICS EXPRESS, 2019, 卷号: 16, 期号: 14, 页码: 6 作者:  Zhang, Shichang;  Wang, Ying;  Chen, Xiaoming;  Han, Yinhe;  Wang, Yujie;  Li, Xiaowei 收藏  |  浏览/下载：77/0  |  提交时间：2019/12/10 DNN accelerator  variable bit-precision  bit-serial  bit-parallel  fine-grained precision
	Promoting the Harmony between Sparsity and Regularity: A Relaxed Synchronous Architecture for Convolutional Neural Networks 期刊论文 IEEE TRANSACTIONS ON COMPUTERS, 2019, 卷号: 68, 期号: 6, 页码: 867-881 作者:  Lu, Wenyan;  Yan, Guihai;  Li, Jiajun;  Gong, Shijun;  Jiang, Shuhao;  Wu, Jingya;  Li, Xiaowei 收藏  |  浏览/下载：249/0  |  提交时间：2019/08/16 Convolutional neural networks  accelerator  architecture  parallelism  sparsity
	Going Cooler With Timing-Constrained TeSHoP: A Temperature Sensing-Based Hotspot-Driven Placement Technique for FPGAs 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 卷号: 25, 期号: 9, 页码: 2525-2537 作者:  Lu, Weina;  Hu, Yu;  Ye, Jing;  Li, Xiaowei 收藏  |  浏览/下载：39/0  |  提交时间：2019/12/12 Computer-aided design flow  field-programmable gate arrays (FPGAs)  hotspot optimization  performance
	Retention-Aware DRAM Assembly and Repair for Future FGR Memories 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2017, 卷号: 36, 期号: 5, 页码: 705-718 作者:  Wang, Ying;  Han, Yin-He;  Wang, Cheng;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：39/0  |  提交时间：2019/12/12 DDR  dynamic random-access memory (DRAM)  memory  refresh
	PSI Conscious Write Scheduling: Architectural Support for Reliable Power Delivery in 3-D Die-Stacked PCM 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 5, 页码: 1613-1625 作者:  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Zhang, Lei;  Cheng, Yuanqing;  Li, Xiaowei 收藏  |  浏览/下载：53/0  |  提交时间：2019/12/13 3-D integration  IR-drop  phase-change memory (PCM)  through-silicon-via (TSV)  write throughput
	MicroFix: Using Timing Interpolation and Delay Sensors for Power Reduction 期刊论文 ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2011, 卷号: 16, 期号: 2, 页码: 21 作者:  Yan, Guihai;  Han, Yinhe;  Liu, Hui;  Liang, Xiaoyao;  Li, Xiaowei 收藏  |  浏览/下载：65/0  |  提交时间：2019/12/16 Design  Performance  Reliability  Power reduction  fine-grained adaptability  DVFS  timing interpolation  delay sensor