DaDianNao: A Neural Network Supercomputer

doi:10.1109/TC.2016.2574353

	DaDianNao: A Neural Network Supercomputer
	Luo, Tao 1; Liu, Shaoli 1; Li, Ling 2; Wang, Yuqing 1; Zhang, Shijin 1; Chen, Tianshi 1; Xu, Zhiwei 1; Temam, Olivier 3; Chen, Yunji 1
	2017
发表期刊	IEEE TRANSACTIONS ON COMPUTERS
ISSN	0018-9340
卷号	66 期号:1 页码:73-88
摘要	Many companies are deploying services largely based on machine-learning algorithms for sophisticated processing of large amounts of data, either for consumers or industry. The state-of-the-art and most popular such machine-learning algorithms are Convolutional and Deep Neural Networks (CNNs and DNNs), which are known to be computationally and memory intensive. A number of neural network accelerators have been recently proposed which can offer high computational capacity/area ratio, but which remain hampered by memory accesses. However, unlike the memory wall faced by processors on general-purpose workloads, the CNNs and DNNs memory footprint, while large, is not beyond the capability of the on-chip storage of a multi-chip system. This property, combined with the CNN/DNN algorithmic characteristics, can lead to high internal bandwidth and low external communications, which can in turn enable high-degree parallelism at a reasonable area cost. In this article, we introduce a custom multi-chip machine-learning architecture along those lines, and evaluate performance by integrating electrical and optical inter-chip interconnects separately. We show that, on a subset of the largest known neural network layers, it is possible to achieve a speedup of 656.63 x over a GPU, and reduce the energy by 184. 05 x on average for a 64-chip system. We implement the node down to the place and route at 28 nm, containing a combination of custom storage and computational units, with electrical inter-chip interconnects.
关键词	Machine learning neuron network supercomputer multi-chip interconnect CNN DNN
DOI	10.1109/TC.2016.2574353
收录类别	SCI
语种	英语
资助项目	NSF of China[61133004] ; NSF of China[61303158] ; NSF of China[61432016] ; NSF of China[61472396] ; NSF of China[61473275] ; NSF of China[61522211] ; NSF of China[61532016] ; NSF of China[61521092] ; 973 Program of China[2015CB358800] ; Strategic Priority Research Program of the CAS[XDA06010403] ; Strategic Priority Research Program of the CAS[XDB02040009] ; International Collaboration Key Program of the CAS[171111KYSB20130002] ; 10,000 talent program
WOS研究方向	Computer Science ; Engineering
WOS类目	Computer Science, Hardware & Architecture ; Engineering, Electrical & Electronic
WOS记录号	WOS:000390667600009
出版者	IEEE COMPUTER SOC
引用统计	被引频次：125[WOS] [WOS记录] [WOS相关记录]
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/7754
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Luo, Tao
作者单位	1.Chinese Acad Sci, Inst Comp Technol, State Key Lab Comp Architecture, Beijing 100190, Peoples R China 2.Chinese Acad Sci, Inst Automat, Beijing 100190, Peoples R China 3.Inria Scalay, F-91120 Palaiseau, France
推荐引用方式 GB/T 7714	Luo, Tao,Liu, Shaoli,Li, Ling,et al. DaDianNao: A Neural Network Supercomputer[J]. IEEE TRANSACTIONS ON COMPUTERS,2017,66(1):73-88.
APA	Luo, Tao.,Liu, Shaoli.,Li, Ling.,Wang, Yuqing.,Zhang, Shijin.,...&Chen, Yunji.(2017).DaDianNao: A Neural Network Supercomputer.IEEE TRANSACTIONS ON COMPUTERS,66(1),73-88.
MLA	Luo, Tao,et al."DaDianNao: A Neural Network Supercomputer".IEEE TRANSACTIONS ON COMPUTERS 66.1(2017):73-88.