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Going Cooler With Timing-Constrained TeSHoP: A Temperature Sensing-Based Hotspot-Driven Placement Technique for FPGAs
Lu, Weina1,2; Hu, Yu1,2; Ye, Jing1; Li, Xiaowei1,2
2017-09-01
发表期刊IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
ISSN1063-8210
卷号25期号:9页码:2525-2537
摘要The continuous shrinking of the feature size in CMOS technology has significantly increased the power densities of integrated circuits, leading to severe temperature issues. However, the previous offline simulation-based thermal optimization works cast large deviations with the reality, while online sensing-based thermal managements usually incur significant performance overhead. Therefore, it is crucial to propose a method that could achieve fine-grained optimization with accurate temperature profiles. In this paper, we propose a timingconstraint temperature sensing-based hotspot-driven placement technique for field-programmable gate arrays (FPGAs). The hotspot optimization issue is modeled as a hyper minimum bipartite matching problem and is solved by a place adjustment with the input of an online sensed temperature profile. We propose an open-source/commercial hybrid design flow to implement the whole optimization in Xilinx Virtex-6 FPGA. Experimental results demonstrate a significant reduction in peak temperature and a great improvement on thermal uniformity, with slight performance overhead under timing constraints.
关键词Computer-aided design flow field-programmable gate arrays (FPGAs) hotspot optimization performance
DOI10.1109/TVLSI.2017.2707120
收录类别SCI
语种英语
资助项目National Natural Science Foundation of China[61274030] ; National Natural Science Foundation of China[61532017] ; National Natural Science Foundation of China[61376043] ; National Natural Science Foundation of China[61521092]
WOS研究方向Computer Science ; Engineering
WOS类目Computer Science, Hardware & Architecture ; Engineering, Electrical & Electronic
WOS记录号WOS:000408425400013
出版者IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
引用统计
被引频次:3[WOS]   [WOS记录]     [WOS相关记录]
文献类型期刊论文
条目标识符http://119.78.100.204/handle/2XEOYT63/6669
专题中国科学院计算技术研究所期刊论文_英文
通讯作者Hu, Yu
作者单位1.Chinese Acad Sci, Inst Comp Technol, State Key Lab Comp Architecture, Beijing 100190, Peoples R China
2.Chinese Acad Sci, Grad Univ, Beijing 100080, Peoples R China
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GB/T 7714
Lu, Weina,Hu, Yu,Ye, Jing,et al. Going Cooler With Timing-Constrained TeSHoP: A Temperature Sensing-Based Hotspot-Driven Placement Technique for FPGAs[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS,2017,25(9):2525-2537.
APA Lu, Weina,Hu, Yu,Ye, Jing,&Li, Xiaowei.(2017).Going Cooler With Timing-Constrained TeSHoP: A Temperature Sensing-Based Hotspot-Driven Placement Technique for FPGAs.IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS,25(9),2525-2537.
MLA Lu, Weina,et al."Going Cooler With Timing-Constrained TeSHoP: A Temperature Sensing-Based Hotspot-Driven Placement Technique for FPGAs".IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 25.9(2017):2525-2537.
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