Institute of Computing Technology, Chinese Academy IR
| Exploring the DIMM PIM Architecture for Accelerating Time Series Analysis | |
| Shi, Shunchen1,2; Yang, Fan1,2; Li, Zhichun1,2; Li, Xueqi1,2; Sun, Ninghui1,2 | |
| 2025 | |
| 发表期刊 | IEEE COMPUTER ARCHITECTURE LETTERS
![]() |
| ISSN | 1556-6056 |
| 卷号 | 24期号:1页码:169-172 |
| 摘要 | Time series analysis (TSA) is an important technique for extracting information from domain data. TSA is memory-bound on conventional platforms due to excessive off-chip data movements between processing units and the main memory of the system. Processing in memory (PIM) is a paradigm that alleviates the bottleneck of memory access for data-intensive applications by enabling computation to be performed directly within memory. In this paper, we first perform profiling to characterize TSA on conventional CPUs. Then, we implement TSA on real-world commercial DRAM Dual-Inline Memory Module (DIMM) PIM hardware UPMEM and identify computation as the primary bottleneck on PIM. Finally, we evaluate the impact of enhancing the computational capability of current DIMM PIM hardware on accelerating TSA. Overall, our work provides insights for designing the optimized DIMM PIM architecture for high-performance and efficient time series analysis. |
| 关键词 | Time series analysis Computer architecture Pipelines Hardware Bandwidth Indexes Parallel processing Data mining Central Processing Unit Data transfer processing in memory |
| DOI | 10.1109/LCA.2025.3562431 |
| 收录类别 | SCI |
| 语种 | 英语 |
| 资助项目 | National Natural Science Foundation of China[62202454] ; National Natural Science Foundation of China[62488101] ; Beijing Natural Science Foundation[QY23181] |
| WOS研究方向 | Computer Science |
| WOS类目 | Computer Science, Hardware & Architecture |
| WOS记录号 | WOS:001502792000005 |
| 出版者 | IEEE COMPUTER SOC |
| 引用统计 | |
| 文献类型 | 期刊论文 |
| 条目标识符 | http://119.78.100.204/handle/2XEOYT63/42310 |
| 专题 | 中国科学院计算技术研究所期刊论文_英文 |
| 通讯作者 | Li, Xueqi |
| 作者单位 | 1.Chinese Acad Sci, Inst Comp Technol, Beijing 100190, Peoples R China 2.Univ Chinese Acad Sci, Beijing 101408, Peoples R China |
| 推荐引用方式 GB/T 7714 | Shi, Shunchen,Yang, Fan,Li, Zhichun,et al. Exploring the DIMM PIM Architecture for Accelerating Time Series Analysis[J]. IEEE COMPUTER ARCHITECTURE LETTERS,2025,24(1):169-172. |
| APA | Shi, Shunchen,Yang, Fan,Li, Zhichun,Li, Xueqi,&Sun, Ninghui.(2025).Exploring the DIMM PIM Architecture for Accelerating Time Series Analysis.IEEE COMPUTER ARCHITECTURE LETTERS,24(1),169-172. |
| MLA | Shi, Shunchen,et al."Exploring the DIMM PIM Architecture for Accelerating Time Series Analysis".IEEE COMPUTER ARCHITECTURE LETTERS 24.1(2025):169-172. |
| 条目包含的文件 | 条目无相关文件。 | |||||
除非特别说明,本系统中所有内容都受版权保护,并保留所有权利。
修改评论