Institute of Computing Technology, Chinese Academy IR
| LitTLS: Lightweight Thread-Level Speculation on Little Cores | |
| Cheng, Xin1,2; Ye, Jinpeng1,2; Deng, Haoyu1,2; Zhang, Tingting3; Liu, Tianyi4; Wang, Jian1,2 | |
| 2025-06-01 | |
| 发表期刊 | ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
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| ISSN | 1544-3566 |
| 卷号 | 22期号:2页码:27 |
| 摘要 | Thread-Level Speculation (TLS) utilizes speculative parallelization to accelerate hard-to-parallelize serial codes on multi-cores. As the heterogeneous multi-core architecture is becoming ubiquitous, it presents an opportunity for TLS to reorganize little cores for the acceleration of these serial codes instead of a big core with similar or more area and power. However, previous TLS designs significantly suffer from extended hardware overhead and costly speculative forwarding. We present LitTLS, a lightweight TLS design with versioning caches to eliminate significant extended hardware overhead by storing versions in caches without speculative write buffers and memory undo-logs. Additionally, LitTLS introduces the Speculative Address Table, a novel component to accelerate speculative forwarding with a central structure to trace memory dependencies. Evaluations on four little cores show that LitTLS achieves an average performance speedup of 2.87x compared to a little core, outperforming a big core by 94% with similar area and less power. The extended area size is only 0.07 mm2, and the maximum increase in dynamic power consumption is limited to 0.3%, compared to four little cores. |
| 关键词 | Thread-level speculation parallel computing heterogeneous multicore |
| DOI | 10.1145/3719655 |
| 收录类别 | SCI |
| 语种 | 英语 |
| 资助项目 | National Key Research and Development Program of China[2022YFB3105100] |
| WOS研究方向 | Computer Science |
| WOS类目 | Computer Science, Hardware & Architecture ; Computer Science, Theory & Methods |
| WOS记录号 | WOS:001533440900008 |
| 出版者 | ASSOC COMPUTING MACHINERY |
| 引用统计 | |
| 文献类型 | 期刊论文 |
| 条目标识符 | http://119.78.100.204/handle/2XEOYT63/42093 |
| 专题 | 中国科学院计算技术研究所期刊论文_英文 |
| 通讯作者 | Zhang, Tingting; Liu, Tianyi |
| 作者单位 | 1.Chinese Acad Sci, State Key Lab Processors, Inst Comp Technol, Beijing, Peoples R China 2.Univ Chinese Acad Sci, Beijing, Peoples R China 3.Loongson Technol Co Ltd, Beijing, Peoples R China 4.Univ Texas San Antonio, Comp Sci, San Antonio, TX 78249 USA |
| 推荐引用方式 GB/T 7714 | Cheng, Xin,Ye, Jinpeng,Deng, Haoyu,et al. LitTLS: Lightweight Thread-Level Speculation on Little Cores[J]. ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION,2025,22(2):27. |
| APA | Cheng, Xin,Ye, Jinpeng,Deng, Haoyu,Zhang, Tingting,Liu, Tianyi,&Wang, Jian.(2025).LitTLS: Lightweight Thread-Level Speculation on Little Cores.ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION,22(2),27. |
| MLA | Cheng, Xin,et al."LitTLS: Lightweight Thread-Level Speculation on Little Cores".ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION 22.2(2025):27. |
| 条目包含的文件 | 条目无相关文件。 | |||||
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