Institute of Computing Technology, Chinese Academy IR
| A 36 mJ/Inf Convolution Accelerator With Reduced Memory Access and Regrouped Sparse Kernels for Environment Sound Classification on Edge Devices | |
| Feng, Lichen1; Wang, Tao1; Cai, Rundong1; Min, Feng2; Zhu, Zhangming1 | |
| 2025-09-01 | |
| 发表期刊 | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
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| ISSN | 1549-7747 |
| 卷号 | 72期号:9页码:1258-1262 |
| 摘要 | Efficient environment sound classification (ESC) on edge devices is valuable for applications requiring continuous, long-term monitoring. Existing ESC processors have demonstrated great reductions in latency and resource occupation. However, model sparsity and computation flow still require further optimization. In this brief, we propose an end-to-end ultra-lightweight Depthwise Separable Convolution (DSC) neural network, E2E-ULDSC-Pruned, which is made publicly available as an open-source release. To implement this model, a customized accelerator featuring pipelined DSC computation and regrouped sparse kernels is developed, achieving 36mJ/Inference in ZCU102 FPGA (254ms latency and 143mW power consumption), which is superior to recent works. |
| 关键词 | Accuracy Convolution Kernel Computational modeling Shape Feature extraction Timing Frequency modulation Power demand Pipelines Convolution accelerator depthwise separable pipeline environment sound classification sparse kernel |
| DOI | 10.1109/TCSII.2025.3585516 |
| 收录类别 | SCI |
| 语种 | 英语 |
| 资助项目 | Scientific and Technological Innovation 2030 of China[2021ZD0114401] ; National Natural Science Foundation of China[62474128] ; National Natural Science Foundation of China[U22A2013] ; National Natural Science Foundation of China[U24A20291] |
| WOS研究方向 | Engineering |
| WOS类目 | Engineering, Electrical & Electronic |
| WOS记录号 | WOS:001566925200017 |
| 出版者 | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC |
| 引用统计 | |
| 文献类型 | 期刊论文 |
| 条目标识符 | http://119.78.100.204/handle/2XEOYT63/41727 |
| 专题 | 中国科学院计算技术研究所期刊论文_英文 |
| 通讯作者 | Min, Feng; Zhu, Zhangming |
| 作者单位 | 1.Xidian Univ, Sch Integrated Circuits, Key Lab Analog Integrated Circuits, Xian 710071, Peoples R China 2.Chinese Acad Sci, Inst Comp Technol, Beijing 100190, Peoples R China |
| 推荐引用方式 GB/T 7714 | Feng, Lichen,Wang, Tao,Cai, Rundong,et al. A 36 mJ/Inf Convolution Accelerator With Reduced Memory Access and Regrouped Sparse Kernels for Environment Sound Classification on Edge Devices[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS,2025,72(9):1258-1262. |
| APA | Feng, Lichen,Wang, Tao,Cai, Rundong,Min, Feng,&Zhu, Zhangming.(2025).A 36 mJ/Inf Convolution Accelerator With Reduced Memory Access and Regrouped Sparse Kernels for Environment Sound Classification on Edge Devices.IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS,72(9),1258-1262. |
| MLA | Feng, Lichen,et al."A 36 mJ/Inf Convolution Accelerator With Reduced Memory Access and Regrouped Sparse Kernels for Environment Sound Classification on Edge Devices".IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS 72.9(2025):1258-1262. |
| 条目包含的文件 | 条目无相关文件。 | |||||
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