Institute of Computing Technology, Chinese Academy IR
| OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine-Learning Tasks in Logic Synthesis | |
| Ni, Liwei1,2,3; Wang, Rui4; Liu, Miao5; Meng, Xingyu2; Lin, Xiaoze1,2,3; Liu, Junfeng2; Luo, Guojie6,7; Chu, Zhufei8; Qian, Weikang9,10; Yang, Xiaoyan11; Xie, Biwei1; Li, Xingquan2; Li, Huawei1,2,3 | |
| 2025-10-01 | |
| 发表期刊 | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
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| ISSN | 0278-0070 |
| 卷号 | 44期号:10页码:3830-3843 |
| 摘要 | This article introduces OpenLS-DGF, an adaptive logic synthesis dataset generation framework, to enhance machine-learning (ML) applications within the logic synthesis process. Previous dataset generation flows were tailored for specific tasks or lacked integrated ML capabilities. While OpenLS-DGF supports various ML tasks by encapsulating the three fundamental steps of logic synthesis: 1) Boolean representation; 2) logic optimization; and 3) technology mapping. It preserves the original information in both Verilog and ML-friendly GraphML formats. The Verilog files offer semi-customizable capabilities, enabling researchers to insert additional steps and incrementally refine the generated dataset. Furthermore, OpenLS-DGF includes an adaptive circuit engine that facilitates the final dataset management and downstream tasks. The generated OpenLS-D-v1 dataset comprises 46 combinational designs from established benchmarks, totaling over 966 000 Boolean circuits. OpenLS-D-v1 supports integrating new data features, making it more versatile for new tasks. This article demonstrates the versatility of OpenLS-D-v1 through four distinct downstream tasks: circuit classification, circuit ranking, quality of results (QoR) prediction, and probability prediction. Each task is chosen to represent essential steps of logic synthesis, and the experimental results show the generated dataset from OpenLS-DGF achieves prominent diversity and applicability. The source code and datasets are available at https://github.com/Logic-Factory/ACE/blob/master/OpenLS-DGF. |
| 关键词 | Logic Logic gates Delays Optimization Machine learning Hardware design languages Boolean functions Computer science Benchmark testing Wire Adaptive application dataset logic synthesis machine learning (ML) |
| DOI | 10.1109/TCAD.2025.3555506 |
| 收录类别 | SCI |
| 语种 | 英语 |
| 资助项目 | Major Key Project of PCL[PCL2023A03] ; Natural Science Foundation of China[62090024] ; Natural Science Foundation of China[62274100] ; Natural Science Foundation of Fujian Province[2024J09045] |
| WOS研究方向 | Computer Science ; Engineering |
| WOS类目 | Computer Science, Hardware & Architecture ; Computer Science, Interdisciplinary Applications ; Engineering, Electrical & Electronic |
| WOS记录号 | WOS:001577057000021 |
| 出版者 | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC |
| 引用统计 | |
| 文献类型 | 期刊论文 |
| 条目标识符 | http://119.78.100.204/handle/2XEOYT63/41693 |
| 专题 | 中国科学院计算技术研究所期刊论文_英文 |
| 通讯作者 | Li, Xingquan |
| 作者单位 | 1.Chinese Acad Sci, Inst Comp Technol, State Key Lab Processors, Beijing 100190, Peoples R China 2.Pengcheng Lab, Dept Optoelect Informat & Opt Fiber Commun, Shenzhen 518055, Peoples R China 3.Univ Chinese Acad Sci, Beijing 101408, Peoples R China 4.Shenzhen Univ, Coll Comp Sci & Software Engn, Shenzhen 518060, Peoples R China 5.Univ Chinese Acad Sci, Sch Comp Sci & Technol, Beijing 100049, Peoples R China 6.Peking Univ, Sch Comp Sci, Beijing 100871, Peoples R China 7.Peking Univ, Ctr Energy Efficient Comp & Applicat, Beijing 100871, Peoples R China 8.Ningbo Univ, Fac Elect Engn & Comp Sci, Ningbo 315211, Peoples R China 9.Shanghai Jiao Tong Univ, Univ Michigan Shanghai Jiao Tong Univ Joint Inst, Shanghai 200240, Peoples R China 10.Shanghai Jiao Tong Univ, MoE Key Lab Artificial Intelligence, Shanghai 200240, Peoples R China 11.Hangzhou Dianzi Univ, Sch Elect & Informat Engn, Hangzhou 311121, Peoples R China |
| 推荐引用方式 GB/T 7714 | Ni, Liwei,Wang, Rui,Liu, Miao,et al. OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine-Learning Tasks in Logic Synthesis[J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS,2025,44(10):3830-3843. |
| APA | Ni, Liwei.,Wang, Rui.,Liu, Miao.,Meng, Xingyu.,Lin, Xiaoze.,...&Li, Huawei.(2025).OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine-Learning Tasks in Logic Synthesis.IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS,44(10),3830-3843. |
| MLA | Ni, Liwei,et al."OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine-Learning Tasks in Logic Synthesis".IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 44.10(2025):3830-3843. |
| 条目包含的文件 | 条目无相关文件。 | |||||
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