DFU-E: A Dataflow Architecture for Edge DSP and AI Applications

doi:10.1109/TPDS.2025.3555329

	DFU-E: A Dataflow Architecture for Edge DSP and AI Applications
	Li, Wenming 1,2; Fan, Zhihua 1,2; Liu, Tianyu 1,2; Wang, Zhen 1,2; Wu, Haibin 1,2; Wu, Meng 1,2; Zhang, Kunming 1,2; Liu, Yanhuan 1,2; Sun, Ninghui 1,2; Ye, Xiaochun 1,2; Fan, Dongrui 1,2
	2025-06-01
发表期刊	IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS
ISSN	1045-9219
卷号	36 期号:6 页码:1100-1114
摘要	Edge computing aims to enable swift, real-time data processing, analysis, and storage close to the data source. However, edge computing platforms are often constrained by limited processing power and efficiency. This paper presents DFU-E, a dataflow-based accelerator specifically designed to meet the demands of edge digital signal processing (DSP) and artificial intelligence (AI) applications. Our design addresses real-world requirements with three main innovations. First, to accommodate the diverse algorithms utilized at the edge, we propose a multi-layer dataflow mechanism capable of exploiting task-level, instruction block-level, instruction-level, and data-level parallelism. Second, we develop an edge dataflow architecture that includes a customized processing element (PE) array, memory, and on-chip network microarchitecture optimized for the multi-layer dataflow mechanism. Third, we design an edge dataflow software stack that enables automatic optimizations through operator fusion, dataflow graph mapping, and task scheduling. We utilize representative real-world DSP and AI applications for evaluation. Comparing with Nvidia's state-of-the-art edge computing processor, DFU-E achieves up to 1.42x geometric mean performance improvement and 1.27x energy efficiency improvement.
关键词	Artificial intelligence Hardware Edge computing Computer architecture Computational modeling Single instruction multiple data Energy efficiency Target recognition Radar polarimetry Real-time systems Dataflow architecture edge computing digital signal processing AI multi-layer dataflow mechanism
DOI	10.1109/TPDS.2025.3555329
收录类别	SCI
语种	英语
资助项目	National Key R&D Program of China[2023YFB4503500] ; Beijing Nova Program[20220484054] ; Beijing Nova Program[20230484420] ; Beijing Natural Science Foundation[L234078] ; CAS Project for Youth Innovation Promotion Association
WOS研究方向	Computer Science ; Engineering
WOS类目	Computer Science, Theory & Methods ; Engineering, Electrical & Electronic
WOS记录号	WOS:001470409900005
出版者	IEEE COMPUTER SOC
引用统计
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/40589
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Fan, Zhihua
作者单位	1.Chinese Acad Sci, Inst Comp Technol, State Key Lab Processors, Beijing 100190, Peoples R China 2.UCAS, Sch Comp Sci & Technol, Beijing 100190, Peoples R China
推荐引用方式 GB/T 7714	Li, Wenming,Fan, Zhihua,Liu, Tianyu,et al. DFU-E: A Dataflow Architecture for Edge DSP and AI Applications[J]. IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS,2025,36(6):1100-1114.
APA	Li, Wenming.,Fan, Zhihua.,Liu, Tianyu.,Wang, Zhen.,Wu, Haibin.,...&Fan, Dongrui.(2025).DFU-E: A Dataflow Architecture for Edge DSP and AI Applications.IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS,36(6),1100-1114.
MLA	Li, Wenming,et al."DFU-E: A Dataflow Architecture for Edge DSP and AI Applications".IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS 36.6(2025):1100-1114.