Institute of Computing Technology, Chinese Academy IR
SM2-based low-cost and efficient parallel modular multiplication | |
Chen, F.1,2,3; Liu, Y.1,2; Zhang, T.2; Xie, D.2; Shen, Z.2 | |
2022-10-01 | |
发表期刊 | MICROPROCESSORS AND MICROSYSTEMS |
ISSN | 0141-9331 |
卷号 | 94页码:7 |
摘要 | Elliptic curve encryption (ECC) has been widely used in public key cryptography, and modular multiplicationis one of the core operations of elliptic curve encryption. This paper presents a low-cost high-speed parallelmodular multiplication implementation based on SM2. Using the characteristics of the prime (??256), the two-step multiplication and reduction of modular multiplication are performed in parallel. The 8-part karatsubaalgorithm is used in multiplication. In the process of performing multiplication, in order to reduce theconsumption of multiplier resources, the karatsuba algorithm is used to improve the ordinary multiplier. Thecontrol signal????= 0/1is used to control the multiplier to perform ordinary multiplication or karatsubaalgorithm multiplication. Then the multiplier is reused. 4 improved 32-bit multipliers are used in complete256-bit modular multiplication. Experiments show that on the 100 MHz Artix-7 FPGA hardware platform, only12K LUTs are needed, and a modular multiplication operation can be completed in0.09 mu s. Comprehensivetime and area, our design has certain advantages |
关键词 | SM2 Modular multiplication Low-cost High-speed Parallel |
DOI | 10.1016/j.micpro.2022.104650 |
收录类别 | SCI |
语种 | 英语 |
资助项目 | National Natural Science Foundation of China[61972438] ; State Key Laboratory of Computer Architecture (Institute of Computing Technology, Chinese Academy of Sciences)[CARCH201810] |
WOS研究方向 | Computer Science ; Engineering |
WOS类目 | Computer Science, Hardware & Architecture ; Computer Science, Theory & Methods ; Engineering, Electrical & Electronic |
WOS记录号 | WOS:000864754200007 |
出版者 | ELSEVIER |
引用统计 | |
文献类型 | 期刊论文 |
条目标识符 | http://119.78.100.204/handle/2XEOYT63/19789 |
专题 | 中国科学院计算技术研究所期刊论文 |
通讯作者 | Chen, F. |
作者单位 | 1.Anhui Normal Univ, Wuhu, Peoples R China 2.Chinese Acad Sci, Inst Comp Technol, State Key Lab Comp Architecture, Beijing, Peoples R China 3.Anhui Normal Univ, Sch Comp & Informat, Wuhu 241002, Anhui, Peoples R China |
推荐引用方式 GB/T 7714 | Chen, F.,Liu, Y.,Zhang, T.,et al. SM2-based low-cost and efficient parallel modular multiplication[J]. MICROPROCESSORS AND MICROSYSTEMS,2022,94:7. |
APA | Chen, F.,Liu, Y.,Zhang, T.,Xie, D.,&Shen, Z..(2022).SM2-based low-cost and efficient parallel modular multiplication.MICROPROCESSORS AND MICROSYSTEMS,94,7. |
MLA | Chen, F.,et al."SM2-based low-cost and efficient parallel modular multiplication".MICROPROCESSORS AND MICROSYSTEMS 94(2022):7. |
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