Hardware-software co-exploration with racetrack memory based in-memory computing for CNN inference in embedded systems

doi:10.1016/j.sysarc.2022.102507

	Hardware-software co-exploration with racetrack memory based in-memory computing for CNN inference in embedded systems
	Choong, Benjamin Chen Ming 1; Luo, Tao 2; Liu, Cheng 3; He, Bingsheng 4; Zhang, Wei 5; Zhou, Joey Tianyi 6
	2022-07-01
发表期刊	JOURNAL OF SYSTEMS ARCHITECTURE
ISSN	1383-7621
卷号	128 页码:20
摘要	Deep neural networks generate and process large volumes of data, posing challenges for low-resource embedded systems. In-memory computing has been demonstrated as an efficient computing infrastructure and shows promise for embedded AI applications. Among newly-researched memory technologies, racetrack memory is a non-volatile technology that allows high data density fabrication, making it a good fit for in memory computing. However, integrating in-memory arithmetic circuits with memory cells affects both the memory density and power efficiency. It remains challenging to build efficient in-memory arithmetic circuits on racetrack memory within area and energy constraints. To this end, we present an efficient in-memory convolutional neural network (CNN) accelerator optimized for use with racetrack memory. We design a series of fundamental arithmetic circuits as in-memory computing cells suited for multiply-and-accumulate operations. Moreover, we explore the design space of racetrack memory based systems and CNN model architectures, employing co-design to improve the efficiency and performance of performing CNN inference in racetrack memory while maintaining model accuracy. Our designed circuits and model-system co-optimization strategies achieve a small memory bank area with significant improvements in energy and performance for racetrack memory based embedded systems.
关键词	Artificial intelligence Hardware-software co-design Deep learning Embedded systems Emerging memory
DOI	10.1016/j.sysarc.2022.102507
收录类别	SCI
语种	英语
资助项目	Joey Tianyi Zhou's SERC Central Research Fund (Use-inspired Basic Research) ; Singapore Government's Research, Innovation and Enterprise 2020 Plan (Advanced Manufacturing and Engineering domain)[A18A1b0045]
WOS研究方向	Computer Science
WOS类目	Computer Science, Hardware & Architecture ; Computer Science, Software Engineering
WOS记录号	WOS:000802886800003
出版者	ELSEVIER
引用统计	被引频次：3[WOS] [WOS记录] [WOS相关记录]
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/19593
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Luo, Tao
作者单位	1.Natl Univ Singapore, Dept Elect & Comp Engn, 4 Engn Dr 3, Singapore 117583, Singapore 2.Agcy Sci Technol & Res, Inst High Performance Comp, 1 Fusionopolis Way,16-16 Connexis, Singapore 138632, Singapore 3.Chinese Acad Sci, Inst Comp Technol, 6 Kexueyuan South Rd, Beijing 100190, Peoples R China 4.Natl Univ Singapore, Sch Comp, COM1,13 Comp Dr, Singapore 117417, Singapore 5.Hong Kong Univ Sci & Technol, Kowloon, Clear Water Bay, Hong Kong, Peoples R China 6.ASTAR, Ctr Frontier AI Res, 1 Fusionopolis Way,16-16 Connexis, Singapore 138632, Singapore
推荐引用方式 GB/T 7714	Choong, Benjamin Chen Ming,Luo, Tao,Liu, Cheng,et al. Hardware-software co-exploration with racetrack memory based in-memory computing for CNN inference in embedded systems[J]. JOURNAL OF SYSTEMS ARCHITECTURE,2022,128:20.
APA	Choong, Benjamin Chen Ming,Luo, Tao,Liu, Cheng,He, Bingsheng,Zhang, Wei,&Zhou, Joey Tianyi.(2022).Hardware-software co-exploration with racetrack memory based in-memory computing for CNN inference in embedded systems.JOURNAL OF SYSTEMS ARCHITECTURE,128,20.
MLA	Choong, Benjamin Chen Ming,et al."Hardware-software co-exploration with racetrack memory based in-memory computing for CNN inference in embedded systems".JOURNAL OF SYSTEMS ARCHITECTURE 128(2022):20.