Institute of Computing Technology, Chinese Academy IR
An efficient scheduling algorithm for dataflow architecture using loop-pipelining | |
Li, Yi1,2; Wu, Meng1; Ye, Xiaochun1,3; Li, Wenming1; Xue, Rui1,2; Wang, Da1; Zhang, Hao1; Fan, Dongrui1,2 | |
2021-02-08 | |
发表期刊 | INFORMATION SCIENCES |
ISSN | 0020-0255 |
卷号 | 547页码:1136-1153 |
摘要 | Dataflow architecture has native advantages in achieving high instruction parallelism and power efficiency for today's emerging applications such as high performance computing and deep neural network. In dataflow computing, the execution of instructions is driven by data, so the data transfer efficiency of the network on chip (NoC) is a key factor affecting performance. However, the NoC performance degrades due to the increasing use of multi-cast communications in many applications. The existing dataflow architecture instruction scheduling algorithms do not optimize multicast communication between the instruction and its successor instructions, so the routing paths of many multicast packets have forks which cause bandwidth waste and potential network congestion. We propose a sharing path awareness (SPA) algorithm to optimize multicast communication in the dataflow architecture. The algorithm shares the routing paths from the instruction to its child node to reduce the NoC bandwidth waste through the instruction scheduler. For applications using software iteration, we further extend the loop optimization to the SPA algorithm to sufficiently exploit instruction-level parallelism. Compared with the state-of-the-art algorithm, we show that the SPA algorithm achieves 20.21% average performance improvement and 15.11% energy consumption reduction for our experimental workloads. (C) 2020 Elsevier Inc. All rights reserved. |
关键词 | Dataflow architecture Instruction scheduling Multicast Sharing path Loop optimization |
DOI | 10.1016/j.ins.2020.09.029 |
收录类别 | SCI |
语种 | 英语 |
资助项目 | National Key Research and Development Program[2018YFB1003501] ; National Natural Science Foundation of China[61732018] ; National Natural Science Foundation of China[61872335] ; National Natural Science Foundation of China[61802367] ; National Natural Science Foundation of China[61672499] ; Austrian-Chinese Cooperative RD Project (FFG)[171111KYSB20170032] ; Austrian-Chinese Cooperative RD Project (CAS)[171111KYSB20170032] ; Strategic Priority Research Program of Chinese Academy of Sciences[XDC05000000] ; Open Project Program of the State Key Laboratory of Mathematical Engineering and Advanced Computing[2019A07] |
WOS研究方向 | Computer Science |
WOS类目 | Computer Science, Information Systems |
WOS记录号 | WOS:000590678700008 |
出版者 | ELSEVIER SCIENCE INC |
引用统计 | |
文献类型 | 期刊论文 |
条目标识符 | http://119.78.100.204/handle/2XEOYT63/16526 |
专题 | 中国科学院计算技术研究所期刊论文_英文 |
通讯作者 | Ye, Xiaochun |
作者单位 | 1.Chinese Acad Sci, State Key Lab Comp Architecture, ICT, Beijing, Peoples R China 2.UCAS, Sch Comp & Control Engn, Beijing, Peoples R China 3.State Key Lab Math Engn & Adv Comp, Wuxi, Jiangsu, Peoples R China |
推荐引用方式 GB/T 7714 | Li, Yi,Wu, Meng,Ye, Xiaochun,et al. An efficient scheduling algorithm for dataflow architecture using loop-pipelining[J]. INFORMATION SCIENCES,2021,547:1136-1153. |
APA | Li, Yi.,Wu, Meng.,Ye, Xiaochun.,Li, Wenming.,Xue, Rui.,...&Fan, Dongrui.(2021).An efficient scheduling algorithm for dataflow architecture using loop-pipelining.INFORMATION SCIENCES,547,1136-1153. |
MLA | Li, Yi,et al."An efficient scheduling algorithm for dataflow architecture using loop-pipelining".INFORMATION SCIENCES 547(2021):1136-1153. |
条目包含的文件 | 条目无相关文件。 |
除非特别说明,本系统中所有内容都受版权保护,并保留所有权利。
修改评论