Institute of Computing Technology, Chinese Academy IR
Algorithmic and architectural co-design for integer motion estimation of AVS | |
Sheng, Bin; Gao, Wen; Xie, Don | |
2006-08-01 | |
发表期刊 | IEEE TRANSACTIONS ON CONSUMER ELECTRONICS |
ISSN | 0098-3063 |
卷号 | 52期号:3页码:1092-1098 |
摘要 | The video part of A VS has been finalized. In order to enhance coding performance, A VS video standard adopts some new features for motion estimation, such as variable block size search, multiple reference frames, and motion vector prediction. However, the better performance comes at the price of high computational complexity, data dependence and memory access requirement. These new features also make the hardware implementation more difficult, especially for real-time applications. In this paper, we firstly propose an integer motion estimation algorithm from hardware-oriented viewpoint. Experimental results show that the proposed algorithm has almost the same performance as the reference software of A VS in SD TV applications. Then the corresponding VLSI architecture is presented. The VLSI architecture has been described in Verilog HDL and synthesized using 0.18 mu m Artisan CMOS cells library. The circuit totally costs about 400K equivalent logic gates. At 108MHz working frequency, the circuit can meet the real-time requirement for SDTV(720x576, 25fps) applications, with the search area of 192 x 192. The co-design obtains better tradeoff between performance and gate-count(1). |
关键词 | motion estimation AVS VLSI co-design |
收录类别 | SCI |
语种 | 英语 |
WOS研究方向 | Engineering ; Telecommunications |
WOS类目 | Engineering, Electrical & Electronic ; Telecommunications |
WOS记录号 | WOS:000240697000051 |
出版者 | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC |
引用统计 | |
文献类型 | 期刊论文 |
条目标识符 | http://119.78.100.204/handle/2XEOYT63/10727 |
专题 | 中国科学院计算技术研究所期刊论文_英文 |
通讯作者 | Sheng, Bin |
作者单位 | 1.Harbin Inst Technol, Dept Comp Sci & Engn, Harbin 150006, Peoples R China 2.Chinese Acad Sci, Comp Technol Inst, Beijing 100864, Peoples R China |
推荐引用方式 GB/T 7714 | Sheng, Bin,Gao, Wen,Xie, Don. Algorithmic and architectural co-design for integer motion estimation of AVS[J]. IEEE TRANSACTIONS ON CONSUMER ELECTRONICS,2006,52(3):1092-1098. |
APA | Sheng, Bin,Gao, Wen,&Xie, Don.(2006).Algorithmic and architectural co-design for integer motion estimation of AVS.IEEE TRANSACTIONS ON CONSUMER ELECTRONICS,52(3),1092-1098. |
MLA | Sheng, Bin,et al."Algorithmic and architectural co-design for integer motion estimation of AVS".IEEE TRANSACTIONS ON CONSUMER ELECTRONICS 52.3(2006):1092-1098. |
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