Institute of Computing Technology, Chinese Academy IR
Deeply pipelined DSP solution to deblocking filter for H.264/AVC | |
Yang, Zhigang; Gao, Wen; Liu, Yan; Zhao, Debin | |
2006-11-01 | |
发表期刊 | IEEE TRANSACTIONS ON CONSUMER ELECTRONICS |
ISSN | 0098-3063 |
卷号 | 52期号:4页码:1267-1274 |
摘要 | The in-loop deblocking filter in H.264/AVC contains highly adaptive processing on both sample level and block edge level, which inevitably appears in the loop kernel of the algorithm. Therefore it is quite difficult to efficiently implement the filter on digital signal processor (DSP) platform. In this paper, deeply pipelined DSP solutions to both edgefilter and boundary strength decision are presented. To avoid conditional jumping when performing edge filter, DSP first calculate all possible filtered outputs, then combine them with corresponding masks to get single output for each sample, and last conditionally store the combined output based on the final content activity check result. Moreover, on the basis of the symmetry of filtering on both sides of the edge, two symmetrical samples are packed into one register for "pair processing" to increase the parallelism of the pipeline. While for boundary strength decision, two-pass pipelines are designed. In the first pass, strengths are created by using the inter-relative information on block level, and then in the second pass, these strengths are refined based on the intra mode checks on macroblock level. To cooperate with global filter control and also to keep pipelining, a two-level internal memory organization is presented as well. The simulated results indicate that this efficient implementation can support real-time filtering for high resolution videos(1). |
关键词 | DSP software pipeline memory organization deblocking filter H.264/AVC |
收录类别 | SCI |
语种 | 英语 |
WOS研究方向 | Engineering ; Telecommunications |
WOS类目 | Engineering, Electrical & Electronic ; Telecommunications |
WOS记录号 | WOS:000243211000020 |
出版者 | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC |
引用统计 | |
文献类型 | 期刊论文 |
条目标识符 | http://119.78.100.204/handle/2XEOYT63/10709 |
专题 | 中国科学院计算技术研究所期刊论文_英文 |
通讯作者 | Yang, Zhigang |
作者单位 | 1.Harbin Inst Technol, Dept Comp Sci & Technol, Harbin 150006, Peoples R China 2.Chinese Acad Sci, Inst Comp Technol, Beijing 100864, Peoples R China |
推荐引用方式 GB/T 7714 | Yang, Zhigang,Gao, Wen,Liu, Yan,et al. Deeply pipelined DSP solution to deblocking filter for H.264/AVC[J]. IEEE TRANSACTIONS ON CONSUMER ELECTRONICS,2006,52(4):1267-1274. |
APA | Yang, Zhigang,Gao, Wen,Liu, Yan,&Zhao, Debin.(2006).Deeply pipelined DSP solution to deblocking filter for H.264/AVC.IEEE TRANSACTIONS ON CONSUMER ELECTRONICS,52(4),1267-1274. |
MLA | Yang, Zhigang,et al."Deeply pipelined DSP solution to deblocking filter for H.264/AVC".IEEE TRANSACTIONS ON CONSUMER ELECTRONICS 52.4(2006):1267-1274. |
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