An AVS HDTV video decoder architecture employing efficient HW/SW partitioning

	An AVS HDTV video decoder architecture employing efficient HW/SW partitioning
	Jia, Huizhu ; Zhang, Peng ; Xie, Don ; Gao, Wen
	2006-11-01
发表期刊	IEEE TRANSACTIONS ON CONSUMER ELECTRONICS
ISSN	0098-3063
卷号	52 期号:4 页码:1447-1453
摘要	In this paper, we propose an optimized realtime A VS (a Chinese next-generation audio/video coding standard) HDTV video decoder. The decoder has been implemented in a single SoC with HW/SW partitioning. AVS algorithms and complexity are first analyzed. Based on the analysis, a hardware implementation of the MB level 7-stage pipeline is selected. The software tasks are realized with a 32-bit RISC processor. We further propose the optimization of Interface and RISC processor based on the proposed architecture. The AVS decoder (RISC processor and hardware accelerators) is described in high-level Verilog/VHDL hardware description language and implemented in a single-chip A VS HDTV real-time decoder. At 148.5MHz working frequency, the decoder chip can support real-time decoding of NTSC, PAL or HDTV (720p@60 frames/s or 1080i@60 fields/s) bit-streams. Finally, the decoder has been fully tested on a prototyping board.(1)
关键词	AVS HW/SW partition video decoder HDTV
收录类别	SCI
语种	英语
WOS研究方向	Engineering ; Telecommunications
WOS类目	Engineering, Electrical & Electronic ; Telecommunications
WOS记录号	WOS:000243211000045
出版者	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
引用统计	被引频次：9[WOS] [WOS记录] [WOS相关记录]
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/10370
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Jia, Huizhu
作者单位	1.Chinese Acad Sci, Inst Comp Technol, Beijing, Peoples R China 2.Chinese Acad Sci, Grad Sch, Beijing, Peoples R China
推荐引用方式 GB/T 7714	Jia, Huizhu,Zhang, Peng,Xie, Don,et al. An AVS HDTV video decoder architecture employing efficient HW/SW partitioning[J]. IEEE TRANSACTIONS ON CONSUMER ELECTRONICS,2006,52(4):1447-1453.
APA	Jia, Huizhu,Zhang, Peng,Xie, Don,&Gao, Wen.(2006).An AVS HDTV video decoder architecture employing efficient HW/SW partitioning.IEEE TRANSACTIONS ON CONSUMER ELECTRONICS,52(4),1447-1453.
MLA	Jia, Huizhu,et al."An AVS HDTV video decoder architecture employing efficient HW/SW partitioning".IEEE TRANSACTIONS ON CONSUMER ELECTRONICS 52.4(2006):1447-1453.