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Parallel error detection for leading zero anticipation
Zhang, Ge; Hu, Wei-Wu; Qi, Zi-Chu
2006-11-01
发表期刊JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY
ISSN1000-9000
卷号21期号:6页码:901-906
摘要The algorithm and its implementation of the leading zero anticipation (LZA) are very vital for the performance of a high-speed floating-point adder in today's state of art microprocessor design. Unfortunately, in predicting "shift amount" by a conventional LZA design, the result could be off by one position. This paper presents a novel parallel error detection algorithm for a general-case LZA. The proposed approach enables parallel execution of conventional LZA and its error detection, so that the error-indication signal can be generated earlier in the stage of normalization, thus reducing the critical path and improving overall performance. The circuit implementation of this algorithm also shows its advantages of area and power compared with other previous work.
关键词computer arithmetic floating-point addition leading zero anticipation
收录类别SCI
语种英语
WOS研究方向Computer Science
WOS类目Computer Science, Hardware & Architecture ; Computer Science, Software Engineering
WOS记录号WOS:000242640200004
出版者SCIENCE CHINA PRESS
引用统计
文献类型期刊论文
条目标识符http://119.78.100.204/handle/2XEOYT63/10337
专题中国科学院计算技术研究所期刊论文_英文
通讯作者Zhang, Ge
作者单位1.Chinese Acad Sci, Comp Technol Inst, Key Lab Comp Architecture, Beijing 100080, Peoples R China
2.Grad Univ Chinese Acad Sci, Beijing 100039, Peoples R China
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GB/T 7714
Zhang, Ge,Hu, Wei-Wu,Qi, Zi-Chu. Parallel error detection for leading zero anticipation[J]. JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,2006,21(6):901-906.
APA Zhang, Ge,Hu, Wei-Wu,&Qi, Zi-Chu.(2006).Parallel error detection for leading zero anticipation.JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,21(6),901-906.
MLA Zhang, Ge,et al."Parallel error detection for leading zero anticipation".JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY 21.6(2006):901-906.
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