中国科学院计算技术研究所机构知识库

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限定条件	出处：IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS    作者：Liu, Cheng分Liu, Cheng

已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择期刊影响因子升序期刊影响因子降序发表日期升序发表日期降序提交时间升序提交时间降序作者升序作者降序WOS被引频次升序WOS被引频次降序题名升序题名降序
	PDG: A Prefetcher for Dynamic Graph Updating 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 4, 页码: 1246-1259 作者:  Zhang, Xinmiao;  Liu, Cheng;  Ni, Jiacheng;  Cheng, Yuanqing;  Zhang, Lei;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：3/0  |  提交时间：2024/05/20 Prefetching  Arrays  Optimization  Runtime  Heuristic algorithms  Computers  Monitoring  Computer architecture  data prefetching  memory system
	Statistical Modeling of Soft Error Influence on Neural Networks 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 11, 页码: 4152-4163 作者:  Huang, Haitong;  Xue, Xinghua;  Liu, Cheng;  Wang, Ying;  Luo, Tao;  Cheng, Long;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：2/0  |  提交时间：2024/05/20 Fault analysis  fault simulation  neural network (NN) reliability  statistical fault modeling
	Network Pruning for Bit-Serial Accelerators 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 5, 页码: 1597-1609 作者:  Zhao, Xiandong;  Wang, Ying;  Liu, Cheng;  Shi, Cong;  Tu, Kaijie;  Zhang, Lei 收藏  |  浏览/下载：7/0  |  提交时间：2023/12/04 AI accelerators  neural networks (NNs)  NN compression
	Variation Enhanced Attacks Against RRAM-Based Neuromorphic Computing System 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 5, 页码: 1588-1596 作者:  Lv, Hao;  Li, Bing;  Zhang, Lei;  Liu, Cheng;  Wang, Ying 收藏  |  浏览/下载：7/0  |  提交时间：2023/12/04 Security  Hardware  Neuromorphic engineering  Computational modeling  Circuit faults  Resistance  Immune system  Adversarial attack  fault injection attack  neuromorphic computing system (NCS)  processing in memory  reliability  resistive memory
	HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 10, 页码: 3400-3413 作者:  Liu, Cheng;  Chu, Cheng;  Xu, Dawen;  Wang, Ying;  Wang, Qianlong;  Li, Huawei;  Li, Xiaowei;  Cheng, Kwang-Ting 收藏  |  浏览/下载：25/0  |  提交时间：2022/12/07 Circuit faults  Computational modeling  Deep learning  Hardware  Redundancy  Neural networks  Computer architecture  Deep learning accelerator (DLA)  fault detection  fault tolerance  hybrid computing architecture (HyCA)