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Breaking the von Neumann bottleneck: architecture-level processing-in-memory technology 期刊论文
SCIENCE CHINA-INFORMATION SCIENCES, 2021, 卷号: 64, 期号: 6, 页码: 10
作者:  Zou, Xingqi;  Xu, Sheng;  Chen, Xiaoming;  Yan, Liang;  Han, Yinhe
收藏  |  浏览/下载:51/0  |  提交时间:2021/12/01
processing-in-memory (PIM)  von Neumann bottleneck  memory wall  PIM simulator  architecture-level PIM  
LPM: A Systematic Methodology for Concurrent Data Access Pattern Optimization from a Matching Perspective 期刊论文
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2019, 卷号: 30, 期号: 11, 页码: 2478-2493
作者:  Liu, Yuhang;  Sun, Xian-He
收藏  |  浏览/下载:47/0  |  提交时间:2020/12/10
Concurrent computing  Optimization  Delays  Program processors  Hardware  Systematics  Analytical models  Memory wall  memory stall time  efficiency  performance optimization  layered performance matching (LPM)  memory concurrency