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VANUCA: Enabling Near-Threshold Voltage Operation in Large-Capacity Cache 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 3, 页码: 858-870
作者:  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:38/0  |  提交时间:2019/12/13
Cache design  fault tolerant  multi-V-dd  near-threshold voltage (NTV)  nonuniform cache access (NUCA)  
无权访问的条目 期刊论文
作者:  Wei-Wu Hu(胡伟武);  Ji-Ye Zhao(赵继业);  Shi-Qiang Zhong(钟石强);  Xu Yang(杨旭);  Elio Guidetti;  Chris Wu(吴永强)
Adobe PDF(540Kb)  |  收藏  |  浏览/下载:0/0  |  提交时间:2010/11/02
Implementing a 1GHz four-issue out-of-order execution microprocessor in a standard cell ASIC methodology 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2007, 卷号: 22, 期号: 1, 页码: 1-14
作者:  Hu, Wei-Wu;  Zhao, Ji-Ye;  Zhong, Shi-Qiang;  Yang, Xu;  Guidetti, Elio;  Wu, Chris
收藏  |  浏览/下载:43/0  |  提交时间:2019/12/16
general-purpose processor  superscalar pipeline  out-of-order execution  non-blocking cache  physical design  synthesis flow  bit-sliced placement  crafted cell  performance evaluation