中国科学院计算技术研究所机构知识库

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	LAPS: Layout-Aware Path Selection for Post-Silicon Timing Characterization 期刊论文 IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2017, 卷号: E100D, 期号: 2, 页码: 323-331 作者:  Hu, Yu;  Ye, Jing;  Shi, Zhiping;  Li, Xiaowei 收藏  |  浏览/下载：58/0  |  提交时间：2019/12/12 process variation  timing variation  sample  path selection  least square
	EcoUp: Towards Economical Datacenter Upgrading 期刊论文 IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2016, 卷号: 27, 期号: 7, 页码: 1968-1981 作者:  Yan, Guihai;  Ma, Jun;  Han, Yinhe;  Li, Xiaowei 收藏  |  浏览/下载：68/0  |  提交时间：2019/12/13 Datacenter upgrading  cost efficiency  performance prediction  recommender systems  collaborative filtering
	CoreRank: Redeeming "Sick Silicon" by Dynamically Quantifying Core-Level Healthy Condition 期刊论文 IEEE TRANSACTIONS ON COMPUTERS, 2016, 卷号: 65, 期号: 3, 页码: 716-729 作者:  Yan, Guihai;  Sun, Faqiang;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：44/0  |  提交时间：2019/12/13 Reliability  heterogeneity  healthy condition  manycore processor
	RISO: Enforce Noninterfered Performance With Relaxed Network-on-Chip Isolation in Many-Core Cloud Processors 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2015, 卷号: 23, 期号: 12, 页码: 3053-3064 作者:  Lu, Hang;  Fu, Binzhang;  Wang, Ying;  Han, Yinhe;  Yan, Guihai;  Li, Xiaowei 收藏  |  浏览/下载：45/0  |  提交时间：2019/12/13 Cloud processor  networks-on-chip (NoCs)  performance isolation  relaxed isolation (RISO)  workload consolidation
	Data Remapping for Static NUCA in Degradable Chip Multiprocessors 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2015, 卷号: 23, 期号: 5, 页码: 879-892 作者:  Wang, Ying;  Zhang, Lei;  Han, Yin-He;  Li, Hua-Wei;  Li, Xiaowei 收藏  |  浏览/下载：43/0  |  提交时间：2019/12/13 Chip multiprocessor (CMP)  fault tolerant  network-on-chip (NoC)  nonuniform cache architecture (NUCA)