CSpace

浏览/检索结果: 共4条,第1-4条 帮助

已选(0)清除 条数/页:   排序方式:
SaaP: Rearchitect SoC-as-a-Processor to Orchestrate Hardware Heterogeneity 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 10, 页码: 3962-3975
作者:  Jin, Pengwei;  Fan, Zhe;  Zhao, Yongwei;  Du, Zidong;  Guo, Hongrui;  Nan, Ziyuan;  Hao, Yifan;  Li, Chongxiao;  Ma, Tianyun;  Zhang, Zhenxing;  Li, Xiaqing;  Li, Wei;  Hu, Xing;  Guo, Qi;  Xu, Zhiwei;  Chen, Tianshi
收藏  |  浏览/下载:56/0  |  提交时间:2025/12/03
IP networks  Hardware  Graphics processing units  Central Processing Unit  Programming  Software  Pipelines  System-on-chip  Process control  Neural networks  Hardware heterogeneity  system architectures  System-on-Chip (SoC)  
Hardware Acceleration for SLAM in Mobile Systems 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2023, 卷号: 38, 期号: 6, 页码: 1300-1322
作者:  Fan, Zhe;  Hao, Yi-Fan;  Zhi, Tian;  Guo, Qi;  Du, Zi-Dong
收藏  |  浏览/下载:92/0  |  提交时间:2024/05/20
hardware accelerator  instruction set  mobile system  simultaneous localization and mapping (SLAM) algorithm  
Cambricon-G: A Polyvalent Energy-Efficient Accelerator for Dynamic Graph Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 1, 页码: 116-128
作者:  Song, Xinkai;  Zhi, Tian;  Fan, Zhe;  Zhang, Zhenxing;  Zeng, Xi;  Li, Wei;  Hu, Xing;  Du, Zidong;  Guo, Qi;  Chen, Yunji
收藏  |  浏览/下载:105/0  |  提交时间:2022/06/21
Accelerator  architecture  graph neural networks (GNNs)  
Machine Learning Computers With Fractal von Neumann Architecture 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2020, 卷号: 69, 期号: 7, 页码: 998-1014
作者:  Zhao, Yongwei;  Fan, Zhe;  Du, Zidong;  Zhi, Tian;  Li, Ling;  Guo, Qi;  Liu, Shaoli;  Xu, Zhiwei;  Chen, Tianshi;  Chen, Yunji
收藏  |  浏览/下载:138/0  |  提交时间:2020/12/10
Machine learning  Computers  Fractals  Programming  Computer architecture  Graphics processing units  Matrix decomposition  Machine learning  architecture  neural networks  programming efficiency