中国科学院计算技术研究所机构知识库

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限定条件	作者：Hu, Wei-Wu    第一作者

已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择期刊影响因子升序期刊影响因子降序发表日期升序发表日期降序提交时间升序提交时间降序作者升序作者降序WOS被引频次升序WOS被引频次降序题名升序题名降序
	Physical Implementation of the Eight-Core Godson-3B Microprocessor 期刊论文 JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2011, 卷号: 26, 期号: 3, 页码: 520-527 作者:  Wang, Ru;  Fan, Bao-Xia;  Yang, Liang;  Gao, Yan-Ping;  Liu, Dong;  Xiao, Bin;  Wang, Jiang-Mei;  Zhang, Yi-Fu;  Wang, Hong;  Hu, Wei-Wu 收藏  |  浏览/下载：81/0  |  提交时间：2019/12/16 physical implementation  hierarchical design flow  GALS  clock mesh  low power
	Design for Testability Features of Godson-3 Multicore Microprocessor 期刊论文 JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2011, 卷号: 26, 期号: 2, 页码: 302-313 作者:  Qi, Zi-Chu;  Liu, Hui;  Li, Xiang-Ku;  Hu, Wei-Wu 收藏  |  浏览/下载：65/0  |  提交时间：2019/12/16 DFT (design for testability)  TAM (test access mechanism)  multicore processor  low power test
	Making effective decisions in computer architects' real-world: Lessons and experiences with Godson-2 processor designs 期刊论文 JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2008, 卷号: 23, 期号: 4, 页码: 620-632 作者:  Hu, Wei-Wu;  Wang, Jian 收藏  |  浏览/下载：37/0  |  提交时间：2019/12/16 superscalar architecture  correlation design  balanced design  optimized design  pico-architecture design  work-on-silicon
	Implementing a 1GHz four-issue out-of-order execution microprocessor in a standard cell ASIC methodology 期刊论文 JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2007, 卷号: 22, 期号: 1, 页码: 1-14 作者:  Hu, Wei-Wu;  Zhao, Ji-Ye;  Zhong, Shi-Qiang;  Yang, Xu;  Guidetti, Elio;  Wu, Chris 收藏  |  浏览/下载：40/0  |  提交时间：2019/12/16 general-purpose processor  superscalar pipeline  out-of-order execution  non-blocking cache  physical design  synthesis flow  bit-sliced placement  crafted cell  performance evaluation