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Breaking the von Neumann bottleneck: architecture-level processing-in-memory technology 期刊论文
SCIENCE CHINA-INFORMATION SCIENCES, 2021, 卷号: 64, 期号: 6, 页码: 10
作者:  Zou, Xingqi;  Xu, Sheng;  Chen, Xiaoming;  Yan, Liang;  Han, Yinhe
收藏  |  浏览/下载:41/0  |  提交时间:2021/12/01
processing-in-memory (PIM)  von Neumann bottleneck  memory wall  PIM simulator  architecture-level PIM  
Swallow: A Versatile Accelerator for Sparse Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 12, 页码: 4881-4893
作者:  Liu, Bosheng;  Chen, Xiaoming;  Han, Yinhe;  Xu, Haobo
收藏  |  浏览/下载:28/0  |  提交时间:2021/12/01
Accelerator  convolutional (Conv) layers  fully connected (FC) layers  sparse neural networks (SNNs)