中国科学院计算技术研究所机构知识库

浏览/检索结果: 共4条，第1-4条

帮助

限定条件	出处：JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY

已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择期刊影响因子升序期刊影响因子降序发表日期升序发表日期降序提交时间升序提交时间降序作者升序作者降序WOS被引频次升序WOS被引频次降序题名升序题名降序
	IMPULP: A Hardware Approach for In-Process Memory Protection via User-Level Partitioning 期刊论文 JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2020, 卷号: 35, 期号: 2, 页码: 418-432 作者:  Zhao, Yang-Yang;  Chen, Ming-Yu;  Liu, Yu-Hang;  Yang, Zong-Hao;  Zhu, Xiao-Jing;  Hong, Zong-Hui;  Guo, Yun-Ge 收藏  |  浏览/下载：96/0  |  提交时间：2020/12/10 in-process isolation  memory protection  out-of-bounds  user-level partitioning
	Physical Implementation of the 1GHz Godson-3 Quad-Core Microprocessor 期刊论文 JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2010, 卷号: 25, 期号: 2, 页码: 192-199 作者:  Fan, Bao-Xia;  Yang, Liang;  Wang, Jiang-Mei;  Wang, Ru;  Xiao, Bin;  Xu, Ying;  Liu, Dong;  Zhao, Ji-Ye 收藏  |  浏览/下载：54/0  |  提交时间：2019/12/16 physical implementation  design methodology  on-chip variation (OCV)  low power  clock tree
	Implementing a 1GHz four-issue out-of-order execution microprocessor in a standard cell ASIC methodology 期刊论文 JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2007, 卷号: 22, 期号: 1, 页码: 1-14 作者:  Hu, Wei-Wu;  Zhao, Ji-Ye;  Zhong, Shi-Qiang;  Yang, Xu;  Guidetti, Elio;  Wu, Chris 收藏  |  浏览/下载：40/0  |  提交时间：2019/12/16 general-purpose processor  superscalar pipeline  out-of-order execution  non-blocking cache  physical design  synthesis flow  bit-sliced placement  crafted cell  performance evaluation
	Evaluation and choice of various branch predictors for low-power embedded processor 期刊论文 JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2003, 卷号: 18, 期号: 6, 页码: 833-838 作者:  Fan, DR;  Yang, HB;  Gao, GR;  Zhao, RC 收藏  |  浏览/下载：70/0  |  提交时间：2019/12/16 branch predictor  embedded processor