中国科学院计算技术研究所机构知识库

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限定条件	发表日期：2020    语种：英语

已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择期刊影响因子升序期刊影响因子降序发表日期升序发表日期降序提交时间升序提交时间降序作者升序作者降序WOS被引频次升序WOS被引频次降序题名升序题名降序
	Swallow: A Versatile Accelerator for Sparse Neural Networks 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 12, 页码: 4881-4893 作者:  Liu, Bosheng;  Chen, Xiaoming;  Han, Yinhe;  Xu, Haobo 收藏  |  浏览/下载：28/0  |  提交时间：2021/12/01 Accelerator  convolutional (Conv) layers  fully connected (FC) layers  sparse neural networks (SNNs)
	FCDM: A Methodology Based on Sensor Pattern Noise Fingerprinting for Fast Confidence Detection to Adversarial Attacks 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 12, 页码: 4791-4804 作者:  Lan, Yazhu;  Nixon, Kent W.;  Guo, Qingli;  Zhang, Guohe;  Xu, Yuanchao;  Li, Hai;  Chen, Yiran 收藏  |  浏览/下载：41/0  |  提交时间：2021/12/01 Perturbation methods  Computational modeling  Data integrity  Detectors  Optimization  Field programmable gate arrays  Hardware  Adversarial attacks  confidence detection  deep neural networks (DNNs)  FPGA-based hardware architecture  sensor pattern noise (SPN)
	An efficient dataflow accelerator for scientific applications 期刊论文 FUTURE GENERATION COMPUTER SYSTEMS-THE INTERNATIONAL JOURNAL OF ESCIENCE, 2020, 卷号: 112, 页码: 580-588 作者:  Ye, Xiaochun;  Tan, Xu;  Wu, Meng;  Feng, Yujing;  Wang, Da;  Zhang, Hao;  Pei, Songwen;  Fan, Dongrui 收藏  |  浏览/下载：219/0  |  提交时间：2020/12/10 Dataflow architecture  Scientific computing  Instruction level parallelism
	Architecting Effectual Computation for Machine Learning Accelerators 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 10, 页码: 2654-2667 作者:  Lu, Hang;  Zhang, Mingzhe;  Han, Yinhe;  Wang, Qi;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：88/0  |  提交时间：2020/12/10 Computational modeling  Throughput  Adders  Machine learning  Acceleration  Kernel  Computational efficiency  Accelerator architectures  neural network hardware  multiplying circuits
	ParaML: A Polyvalent Multicore Accelerator for Machine Learning 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 9, 页码: 1764-1777 作者:  Zhou, Shengyuan;  Guo, Qi;  Du, Zidong;  Liu, Daofu;  Chen, Tianshi;  Li, Ling;  Liu, Shaoli;  Zhou, Jinhong;  Temam, Olivier;  Feng, Xiaobing;  Zhou, Xuehai;  Chen, Yunji 收藏  |  浏览/下载：50/0  |  提交时间：2020/12/10 Neural networks  Machine learning  Testing  Support vector machines  Linear regression  Computers  Computer architecture  Accelerator  machine learning (ML) techniques  multicore accelerator
	Addressing Irregularity in Sparse Neural Networks Through a Cooperative Software/Hardware Approach 期刊论文 IEEE TRANSACTIONS ON COMPUTERS, 2020, 卷号: 69, 期号: 7, 页码: 968-985 作者:  Zeng, Xi;  Zhi, Tian;  Zhou, Xuda;  Du, Zidong;  Guo, Qi;  Liu, Shaoli;  Wang, Bingrui;  Wen, Yuanbo;  Wang, Chao;  Zhou, Xuehai;  Li, Ling;  Chen, Tianshi;  Sun, Ninghui;  Chen, Yunji 收藏  |  浏览/下载：51/0  |  提交时间：2020/12/10 Accelerator  architecture  deep neural networks  sparsity