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Resilience-Aware Frequency Tuning for Neural-Network-Based Approximate Computing Chips 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 卷号: 25, 期号: 10, 页码: 2736-2748
作者:  Wang, Ying;  Deng, Jiachao;  Fang, Yuntan;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：53/0  |  提交时间：2019/12/12
Deep learning  error tolerance  neural network (NN)  timing variation  
STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 卷号: 25, 期号: 4, 页码: 1285-1296
作者:  Song, Lili;  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Cheng, Yuanqing;  Li, Xiaowei
收藏  |  浏览/下载：70/0  |  提交时间：2019/12/12
Approximate computing  machine learning  neural network  spin toque transfer RAM (STT-RAM)  
Path Delay Test Generation Toward Activation of Worst Case Coupling Effects 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2011, 卷号: 19, 期号: 11, 页码: 1969-1982
作者:  Zhang, Minjin;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：73/0  |  提交时间：2019/12/16
Crosstalk-induced delay  delay testing  path delay fault  signal integrity  test generation  timing analysis