Institute of Computing Technology, Chinese Academy IR
WBSP: A Novel Synchronization Mechanism for Architecture Parallel Simulation | |
Wu, Junmin1; Zhu, Xiaodong1; Li, Tao2; Sui, Xiufeng3 | |
2016-03-01 | |
发表期刊 | IEEE TRANSACTIONS ON COMPUTERS |
ISSN | 0018-9340 |
卷号 | 65期号:3页码:992-1005 |
摘要 | Parallelization is an efficient approach to accelerate multi-core, multi-processor and cluster architecture simulators. Nevertheless, frequent synchronization can significantly hinder the performance of a parallel simulator. A common practice in alleviating synchronization cost is to relax synchronization using lengthened synchronous steps. However, as a side effect, simulation accuracy deteriorates considerably. Through analyzing various factors contributing to the causality error in lax synchronization, we observe that a coherent speed across all nodes is critical to achieve high accuracy. To this end, we propose wall-clock based synchronization (WBSP), a novel mechanism that uses wall-clock time to maintain a coherent running speed across the different nodes by periodically synchronizing simulated clocks with the wall clock within each lax step. Our proposed method only results in a modest precision loss while achieving performance close to lax synchronization. We implement WBSP in a many-core parallel simulator and a cluster parallel simulator. Experimental results show that at a scale of 32-host threads, it improves the performance of the many-core simulator by 4.3 x on average with less than a 5.5 percent accuracy loss compared to the conservative mechanism. On the cluster simulator with 64 nodes, our proposed scheme achieves an 8.3 x speedup compared to the conservative mechanism while yielding only a 1.7 percent accuracy loss. Meanwhile, WBSP outperforms the recent proposed adaptive mechanism on simulations that exhibit heavy traffic. |
关键词 | Cluster system parallel simulation full system simulation lax synchronization |
DOI | 10.1109/TC.2015.2439253 |
收录类别 | SCI |
语种 | 英语 |
资助项目 | National Natural Science Foundation of China[61272132] ; National Natural Science Foundation of China[61202062] |
WOS研究方向 | Computer Science ; Engineering |
WOS类目 | Computer Science, Hardware & Architecture ; Engineering, Electrical & Electronic |
WOS记录号 | WOS:000370729600026 |
出版者 | IEEE COMPUTER SOC |
引用统计 | |
文献类型 | 期刊论文 |
条目标识符 | http://119.78.100.204/handle/2XEOYT63/8805 |
专题 | 中国科学院计算技术研究所期刊论文_英文 |
通讯作者 | Wu, Junmin; Zhu, Xiaodong; Li, Tao; Sui, Xiufeng |
作者单位 | 1.Univ Sci & Technol China, Suzhou Inst Adv Study, Suzhou, Jiangsu, Peoples R China 2.Univ Florida, Dept Elect & Comp Engn, Gainesville, FL USA 3.Chinese Acad Sci, Inst Comp Technol, Beijing, Peoples R China |
推荐引用方式 GB/T 7714 | Wu, Junmin,Zhu, Xiaodong,Li, Tao,et al. WBSP: A Novel Synchronization Mechanism for Architecture Parallel Simulation[J]. IEEE TRANSACTIONS ON COMPUTERS,2016,65(3):992-1005. |
APA | Wu, Junmin,Zhu, Xiaodong,Li, Tao,&Sui, Xiufeng.(2016).WBSP: A Novel Synchronization Mechanism for Architecture Parallel Simulation.IEEE TRANSACTIONS ON COMPUTERS,65(3),992-1005. |
MLA | Wu, Junmin,et al."WBSP: A Novel Synchronization Mechanism for Architecture Parallel Simulation".IEEE TRANSACTIONS ON COMPUTERS 65.3(2016):992-1005. |
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