A visual cortex-inspired edge neuromorphic hardware architecture with on-chip multi-layer STDP learning

doi:10.1016/j.compeleceng.2024.109806

	A visual cortex-inspired edge neuromorphic hardware architecture with on-chip multi-layer STDP learning
	He, Junxian 1; Tian, Min 1; Jiang, Ying 1; Wang, Haibing 1; Wang, Tengxiao 1; Zhou, Xichuan 1; Liu, Liyuan 2; Wu, Nanjian 2; Wang, Ying 3; Shi, Cong 1,4
	2024-12-01
发表期刊	COMPUTERS & ELECTRICAL ENGINEERING
ISSN	0045-7906
卷号	120 页码:17
摘要	The era of artificial intelligence of things (AIoT) brings huge challenges on edge visual processing systems under strict processing latency, cost and energy budgets. The emergence of computationally efficient biological spiking neural networks (SNN) and event-driven neuromorphic architecture in recent years have fostered a computing paradigm shift to address these challenges. In this paper, we propose a neuromorphic processor architecture for a multi-layer convolutional SNN (codenamed HMAX SNN model) inspired by human visual cortex hierarchy. The main contributions of this work include: 1) It proposes a fully event-driven, modular, configurable and scalable neuromorphic architecture allowing for flexible tradeoffs among implementation cost, processing speed and visual recognition accuracy with multi-layer convolutional SNNs. 2) It proposes a run-time reconfigurable learning engine enabling fast on-chip unsupervised spiketiming dependent plasticity (STDP) learning for the feature-extraction convolutional layers and also supervised STDP learning for the feature-classification FC layer, in a time-multiplexing way. These techniques greatly improve on-chip learning accuracies beyond 97 % on the Modified National Institute of Standards and Technology database (MNIST) images for the first time among existing edge neuromorphic systems, at reasonable computational and memory costs. Our hardware processor architecture was prototyped on a low-cost Zedboard Zynq-7020 Field-Programmable Gate Array (FPGA) device, and validated on the MNIST, Fashion-MNIST, Olivetti Research Laboratory (ORL) human faces and ETH-80 image datasets. The experimental results demonstrate that the proposed neuromorphic architecture can achieve comparably high on-chip learning accuracy, high inference throughput and high energy efficiency using relatively fewer hardware resource consumptions. We anticipate that the HMAX SNN processor can potentially enhance deployments of edge neuromorphic processors in more practical edge applications.
关键词	Neuromorphic Convolutional neuronal network Spiking neural network HMAX STDP On-chip learning
DOI	10.1016/j.compeleceng.2024.109806
收录类别	SCI
语种	英语
资助项目	National Key Research and Development Program of China[2019YFB2204303] ; National Natural Science Foundation of China[U20A20205] ; National Natural Science Foundation of China[62334008] ; Chongqing Social Security Bureau and Human Resources Dept[cx2020018] ; Fundamental Research Funds for the Central Universities[2024CDJXY020]
WOS研究方向	Computer Science ; Engineering
WOS类目	Computer Science, Hardware & Architecture ; Computer Science, Interdisciplinary Applications ; Engineering, Electrical & Electronic
WOS记录号	WOS:001348204300001
出版者	PERGAMON-ELSEVIER SCIENCE LTD
引用统计
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/39462
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Shi, Cong
作者单位	1.Chongqing Univ, Sch Microelect & Commun Engn, Chongqing 400044, Peoples R China 2.Chinese Acad Sci, Inst Semicond, State Key Lab Superlattices & Microstruct, Beijing 100083, Peoples R China 3.Chinese Acad Sci, Inst Comp Technol, State Key Lab Comp Architecture, Beijing 100190, Peoples R China 4.Chongqing Univ, Key Lab Dependable Serv Comp Cyber Phys Soc, Minist Educ, Chongqing 400044, Peoples R China
推荐引用方式 GB/T 7714	He, Junxian,Tian, Min,Jiang, Ying,et al. A visual cortex-inspired edge neuromorphic hardware architecture with on-chip multi-layer STDP learning[J]. COMPUTERS & ELECTRICAL ENGINEERING,2024,120:17.
APA	He, Junxian.,Tian, Min.,Jiang, Ying.,Wang, Haibing.,Wang, Tengxiao.,...&Shi, Cong.(2024).A visual cortex-inspired edge neuromorphic hardware architecture with on-chip multi-layer STDP learning.COMPUTERS & ELECTRICAL ENGINEERING,120,17.
MLA	He, Junxian,et al."A visual cortex-inspired edge neuromorphic hardware architecture with on-chip multi-layer STDP learning".COMPUTERS & ELECTRICAL ENGINEERING 120(2024):17.