Institute of Computing Technology, Chinese Academy IR
Automatic Target Description File Generation | |
Geng, Hong-Na1,2; Lyu, Fang1; Zhong, Ming1,2; Cui, Hui-Min1,2; Xue, Jingling3; Feng, Xiao-Bing1,2 | |
2023-12-01 | |
发表期刊 | JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY
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ISSN | 1000-9000 |
卷号 | 38期号:6页码:1339-1355 |
摘要 | Agile hardware design is gaining increasing momentum and bringing new chips in larger quantities to the market faster. However, it also takes new challenges for compiler developers to retarget existing compilers to these new chips in shorter time than ever before. Currently, retargeting a compiler backend, e.g., an LLVM backend to a new target, requires compiler developers to write manually a set of target description files (totalling 10 300+ lines of code (LOC) for RISC-V in LLVM), which is error-prone and time-consuming. In this paper, we introduce a new approach, Automatic Target Description File Generation (ATG), which accelerates the generation of a compiler backend for a new target by generating its target description files automatically. Given a new target, ATG proceeds in two stages. First, ATG synthesizes a small list of target-specific properties and a list of code-layout templates from the target description files of a set of existing targets with similar instruction set architectures (ISAs). Second, ATG requests compiler developers to fill in the information for each instruction in the new target in tabular form according to the list of target-specific properties synthesized and then generates its target description files automatically according to the list of code-layout templates synthesized. The first stage can often be reused by different new targets sharing similar ISAs. We evaluate ATG using nine RISC-V instruction sets drawn from a total of 1 029 instructions in LLVM 12.0. ATG enables compiler developers to generate compiler backends for these ISAs that emit the same assembly code as the existing compiler backends for RISC-V but with significantly less development effort (by specifying each instruction in terms of up to 61 target-specific properties only). |
关键词 | retargetability compiler target description target backend automatic generator |
DOI | 10.1007/s11390-022-1919-x |
收录类别 | SCI |
语种 | 英语 |
资助项目 | Strategic Pilot Science and Technology Project of Chinese Academy of Sciences (Category C)[XDC05000000] ; Youth Program of National Natural Science Foundation of China[61802368] |
WOS研究方向 | Computer Science |
WOS类目 | Computer Science, Hardware & Architecture ; Computer Science, Software Engineering |
WOS记录号 | WOS:001154653300014 |
出版者 | SPRINGER SINGAPORE PTE LTD |
引用统计 | |
文献类型 | 期刊论文 |
条目标识符 | http://119.78.100.204/handle/2XEOYT63/38374 |
专题 | 中国科学院计算技术研究所期刊论文_英文 |
通讯作者 | Lyu, Fang |
作者单位 | 1.Chinese Acad Sci, State Key Lab Processors, Inst Comp Technol, Beijing 100190, Peoples R China 2.Univ Chinese Acad Sci, Beijing 100049, Peoples R China 3.Univ New South Wales, Sch Comp Sci & Engn, Sydney, NSW 2052, Australia |
推荐引用方式 GB/T 7714 | Geng, Hong-Na,Lyu, Fang,Zhong, Ming,et al. Automatic Target Description File Generation[J]. JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,2023,38(6):1339-1355. |
APA | Geng, Hong-Na,Lyu, Fang,Zhong, Ming,Cui, Hui-Min,Xue, Jingling,&Feng, Xiao-Bing.(2023).Automatic Target Description File Generation.JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,38(6),1339-1355. |
MLA | Geng, Hong-Na,et al."Automatic Target Description File Generation".JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY 38.6(2023):1339-1355. |
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