TCADer: A Tightly Coupled Accelerator Design framework for heterogeneous system with hardware/software co-design

doi:10.1016/j.sysarc.2023.102822

	TCADer: A Tightly Coupled Accelerator Design framework for heterogeneous system with hardware/software co-design
	Li, Wenqing 1,2; Liu, Tianyi 3; Xiao, Ziyuan 1,2; Qi, Han 1,2; Zhu, Weipu 1,2; Wang, Jian 1,2
	2023-03-01
发表期刊	JOURNAL OF SYSTEMS ARCHITECTURE
ISSN	1383-7621
卷号	136 页码:12
摘要	Domain-specific architectures (DSAs) or hardware accelerators are typical innovations that are leading computer architecture into a new golden age. In a heterogeneous system, these tailored processors (accelerators) are managed by and can work in parallel with the general-purpose CPUs with the help of high-speed input/output (I/O) bus or System on Chip (SoC) bus. However, the high communication overhead makes such loosely coupled architecture unsuitable for small-scale or low-latency tasks. Although integrating accelerators into the CPU pipeline as functional units can significantly reduce the interaction latency, due to the performance side effects to CPU micro-architecture and the increasing design and verification complexity of processors, such tightly coupled architecture is only suitable for very simple tasks. Moreover, the speedup (or utilization) of the tightly coupled accelerator would become limited, because of the different design principles of specialized hardware accelerators and general-purpose CPUs.In this paper, we propose TCADer, a novel tightly coupled accelerator design framework for the heterogeneous system with hardware/software co-design, and it has the following key features: (1) It provides a software runtime and hardware integration environment with low communication overhead for various accelerators, especially effective for fine-grained offloading of small-scale or low-latency tasks; (2) It has a coprocessor management unit that takes over complex memory accesses, ensuring the independence of accelerator and CPU with extremely low interaction latency; and (3) A lightweight runtime environment, called fence model, is proposed to support accelerator usually running in user-mode. With TCADer, we implement five different types of accelerators and integrate them into a real processor. Experimental results show that TCADer obtains the advantages of tightly and loosely coupled integration methods while avoiding their disadvantages. More specifically, compared with the loosely coupled method, TCADer reduces the communication overhead by 98.2%, which is similar to tightly coupled method. Compared with the tightly coupled method, TCADer gets 2.76x speedup. TCADer also supports programmability, and further evaluations show that TCADer is suitable for small-scale, frequent-interactive tasks and can also explore the potential fine-grained parallelism within computing tasks.
关键词	Heterogeneous system Tightly coupled Accelerator design framework Interaction latency Low-latency task
DOI	10.1016/j.sysarc.2023.102822
收录类别	SCI
语种	英语
资助项目	Strategic Priority Research Program of the Chinese Academy of Sciences[XDC05020100]
WOS研究方向	Computer Science
WOS类目	Computer Science, Hardware & Architecture ; Computer Science, Software Engineering
WOS记录号	WOS:000991753200001
出版者	ELSEVIER
引用统计
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/21454
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Wang, Jian
作者单位	1.Chinese Acad Sci, Inst Comp Technol, State Key Lab Processors, Beijing, Peoples R China 2.Univ Chinese Acad Sci, Beijing, Peoples R China 3.Univ Texas San Antonio, San Antonio, TX 78249 USA
推荐引用方式 GB/T 7714	Li, Wenqing,Liu, Tianyi,Xiao, Ziyuan,et al. TCADer: A Tightly Coupled Accelerator Design framework for heterogeneous system with hardware/software co-design[J]. JOURNAL OF SYSTEMS ARCHITECTURE,2023,136:12.
APA	Li, Wenqing,Liu, Tianyi,Xiao, Ziyuan,Qi, Han,Zhu, Weipu,&Wang, Jian.(2023).TCADer: A Tightly Coupled Accelerator Design framework for heterogeneous system with hardware/software co-design.JOURNAL OF SYSTEMS ARCHITECTURE,136,12.
MLA	Li, Wenqing,et al."TCADer: A Tightly Coupled Accelerator Design framework for heterogeneous system with hardware/software co-design".JOURNAL OF SYSTEMS ARCHITECTURE 136(2023):12.