Logic Design and Simulation of a 128-b AES Encryption Accelerator Based on Rapid Single-Flux-Quantum Circuits

doi:10.1109/TASC.2021.3075604

	Logic Design and Simulation of a 128-b AES Encryption Accelerator Based on Rapid Single-Flux-Quantum Circuits
	Zhou, Yan 1,2; Tang, Guang-Ming 2; Yang, Jia-Hong 2,3; Yu, Pei-Shi 2,3; Peng, Changgen 4
	2021-09-01
发表期刊	IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY
ISSN	1051-8223
卷号	31 期号:6 页码:11
摘要	A128-b rapid single-flux-quantum (RSFQ) Advanced Encryption Standard (AES) encryption accelerator based on bit-slice architecture is proposed for the first time. Unlike the traditional methods, the method of looking up only one 256-B table to complete the entire AES round function is proposed. The proposed method can reduce nearly 50% of the hardware cost compared to the traditional method. The simple lookup table, shift, and XOR operations are used in the proposed accelerator where one 256-B table needs to be stored for lookup table operations. TheRSFQlogic circuits of the proposed accelerator are designed and simulated at the logic level. It consists of 136 558 JJs based on the Open Dataset of CONNECT Cell Library for AIST ADP2. The simulation results show the proposed accelerator works correctly.
关键词	Accelerator Advanced Encryption Standard (AES) rapid single flux quantum (RSFQ) superconducting integrated circuits
DOI	10.1109/TASC.2021.3075604
收录类别	SCI
语种	英语
资助项目	Strategic Priority Research Program of Chinese Academy of Sciences[XDA18000000] ; National Natural Science Foundation of China[61802081] ; National Natural Science Foundation of China[U1836205] ; Guizhou Science and Technology Plan Project, China[[2018]3001] ; Guizhou Science and Technology Plan Project, China[[2016]7428]
WOS研究方向	Engineering ; Physics
WOS类目	Engineering, Electrical & Electronic ; Physics, Applied
WOS记录号	WOS:000691900100003
出版者	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
引用统计
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/17136
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Tang, Guang-Ming
作者单位	1.Guizhou Univ, Coll Comp Sci & Technol, Guiyang 550025, Peoples R China 2.Chinese Acad Sci, Inst Comp Technol, Beijing 100190, Peoples R China 3.Univ Chinese Acad Sci, Beijing 100049, Peoples R China 4.Guizhou Univ, Coll Comp Sci & Technol, State Key Lab Publ Big Data, Guiyang 550025, Peoples R China
推荐引用方式 GB/T 7714	Zhou, Yan,Tang, Guang-Ming,Yang, Jia-Hong,et al. Logic Design and Simulation of a 128-b AES Encryption Accelerator Based on Rapid Single-Flux-Quantum Circuits[J]. IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY,2021,31(6):11.
APA	Zhou, Yan,Tang, Guang-Ming,Yang, Jia-Hong,Yu, Pei-Shi,&Peng, Changgen.(2021).Logic Design and Simulation of a 128-b AES Encryption Accelerator Based on Rapid Single-Flux-Quantum Circuits.IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY,31(6),11.
MLA	Zhou, Yan,et al."Logic Design and Simulation of a 128-b AES Encryption Accelerator Based on Rapid Single-Flux-Quantum Circuits".IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY 31.6(2021):11.