Distributed Self-Clock: A Suitable Architecture for SFQ Circuits

doi:10.1109/TASC.2020.3007175

	Distributed Self-Clock: A Suitable Architecture for SFQ Circuits
	Yang, Jia-Hong 1,2; Tang, Guang-Ming 1; Zheng, Xiang-Yu 1,2; Ye, Xiao-Chun 1; Fan, Dong-Rui 1,2; Zhang, Zhi-Min 1; Sun, Ning-Hui 1
	2020-10-01
发表期刊	IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY
ISSN	1051-8223
卷号	30 期号:7 页码:7
摘要	In this article, we propose a novel architecture for single-flux-quantum (SFQ) circuits. It is compatible to the existing synchronous and asynchronous timing schemes and reduces the hardware cost for implementing the pipeline blocking and flushing, which are the two methods to improve the performance of SFQ microprocessors. We simulate two crucial elements, and the functions of the elements are verified successfully. The proposed architecture simplifies the logic design of the circuits, and it can be considered as a general architecture for SFQ circuits because of the compelling characteristics.
关键词	Integrated circuit microprocessors single flux quantum (SFQ) timing scheme
DOI	10.1109/TASC.2020.3007175
收录类别	SCI
语种	英语
资助项目	Chinese Academy of Sciences, China[201893] ; Innovation Program of Institute of Computing Technology, Chinese Academy of Sciences[20186120] ; Strategic Priority Research Program of the Chinese Academy of Sciences[XDA18000000] ; National Natural Science Foundation of China[61732018]
WOS研究方向	Engineering ; Physics
WOS类目	Engineering, Electrical & Electronic ; Physics, Applied
WOS记录号	WOS:000550652300001
出版者	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
引用统计
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/15942
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Tang, Guang-Ming
作者单位	1.Chinese Acad Sci, Inst Comp Technol, State Key Lab Comp Architecture, Beijing 100190, Peoples R China 2.Univ Chinese Acad Sci, Beijing 100049, Peoples R China
推荐引用方式 GB/T 7714	Yang, Jia-Hong,Tang, Guang-Ming,Zheng, Xiang-Yu,et al. Distributed Self-Clock: A Suitable Architecture for SFQ Circuits[J]. IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY,2020,30(7):7.
APA	Yang, Jia-Hong.,Tang, Guang-Ming.,Zheng, Xiang-Yu.,Ye, Xiao-Chun.,Fan, Dong-Rui.,...&Sun, Ning-Hui.(2020).Distributed Self-Clock: A Suitable Architecture for SFQ Circuits.IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY,30(7),7.
MLA	Yang, Jia-Hong,et al."Distributed Self-Clock: A Suitable Architecture for SFQ Circuits".IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY 30.7(2020):7.