A simplified architecture for modulo (2(n)+1) multiplication

	A simplified architecture for modulo (2(n)+1) multiplication
	Ma, YT
	1998-03-01
发表期刊	IEEE TRANSACTIONS ON COMPUTERS
ISSN	0018-9340
卷号	47 期号:3 页码:333-337
摘要	The module (2(n) + 1) multiplication is widely used in the computation of convolutions and in RNS arithmetic and, thus, it is important to reduce the calculation delay. This paper presents a concept of a module (2(n) + 1) carry save adder (MCSA) and uses two MCSAs to perform the residue reduction. We also apply Booth's algorithm to the module (2(n) + 1) multiplication scheme in order to reduce the number of partial products. With these techniques, the new architecture reduces the multiplier's calculation delay and is suitable for VLSI implementation for moderate and large n (n greater than or equal to 16).
关键词	convolution Fermat number transform RNS arithmetic modulo (2(n)+1) multiplication Booth's algorithm Wallace tree carry save adder CSA array carry lookahead adder
收录类别	SCI
语种	英语
WOS研究方向	Computer Science ; Engineering
WOS类目	Computer Science, Hardware & Architecture ; Engineering, Electrical & Electronic
WOS记录号	WOS:000072705400007
出版者	IEEE COMPUTER SOC
引用统计	被引频次：48[WOS] [WOS记录] [WOS相关记录]
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/13265
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Ma, YT
作者单位	Chinese Acad Sci, Comp Technol Inst, Ctr High Performance Comp, Beijing 100080, Peoples R China
推荐引用方式 GB/T 7714	Ma, YT. A simplified architecture for modulo (2(n)+1) multiplication[J]. IEEE TRANSACTIONS ON COMPUTERS,1998,47(3):333-337.
APA	Ma, YT.(1998).A simplified architecture for modulo (2(n)+1) multiplication.IEEE TRANSACTIONS ON COMPUTERS,47(3),333-337.
MLA	Ma, YT."A simplified architecture for modulo (2(n)+1) multiplication".IEEE TRANSACTIONS ON COMPUTERS 47.3(1998):333-337.