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Institute of Computing Technology, Chinese Academy IR
Landing Stencil Code on Godson-T | |
Cui, Hui-Min1,2; Wang, Lei1,2; Fan, Dong-Rui1; Feng, Xiao-Bing1 | |
2010-07-01 | |
发表期刊 | JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY (IF:0.878[JCR-2017],0.943[5-Year]) |
ISSN | 1000-9000 |
卷号 | 25期号:4页码:886-894 |
摘要 | The advent of multi-core/many-core chip technology offers both an extraordinary opportunity and a profound challenge. In particular, computer architects and system software designers are faced with a unique opportunity to introducing new architecture features as well as adequate compiler technology - together they may have profound impact. This paper presents a case study (using the 1-D Jacobi computation) of compiler-amendable performance optimization techniques on a many-core architecture Godson-T. Godson-T architecture has several unique features that are chosen for this study: 1) chip-level global addressable memory in particular the scratchpad memories (SPM) local to the processing cores; 2) fine-grain memory based synchronization (e.g., full-empty bit for fine-grain synchronization). Leveraging state-of-the-art performance optimization methods for 1-D stencil parallelization (e.g., timed tiling and variants), we developed and implement a number of many-core-based optimization for Godson-T. Our experimental study shows good performance in both execution time speedup and scalability, validate the value of globally accessed SPM and fine-grain synchronization mechanism (full-empty bits) under the Godson-T, and provides some useful guidelines for future compiler technology of many-core chip architectures. |
关键词 | many-core stencil Jacobi compiler SPM fine-grain synchronization |
DOI | 10.1007/s11390-010-9373-6 |
收录类别 | SCI |
语种 | 英语 |
资助项目 | National Basic Research 973 Program of China[2005CB321602] ; National Natural Science Foundation of China[60736012] ; National High Technology Research and Development 863 Program of China[2007AA01Z110] ; National High Technology Research and Development 863 Program of China[2009AA01Z103] |
WOS研究方向 | Computer Science |
WOS类目 | Computer Science, Hardware & Architecture ; Computer Science, Software Engineering |
WOS记录号 | WOS:000279714400020 |
出版者 | SCIENCE PRESS |
引用统计 | |
文献类型 | 期刊论文 |
条目标识符 | http://119.78.100.204/handle/2XEOYT63/12449 |
专题 | 中国科学院计算技术研究所期刊论文_英文 |
通讯作者 | Cui, Hui-Min |
作者单位 | 1.Chinese Acad Sci, Inst Comp Technol, Key Lab Comp Syst & Architecture, Beijing 100190, Peoples R China 2.Chinese Acad Sci, Grad Univ, Beijing 100039, Peoples R China |
推荐引用方式 GB/T 7714 | Cui, Hui-Min,Wang, Lei,Fan, Dong-Rui,et al. Landing Stencil Code on Godson-T[J]. JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,2010,25(4):886-894. |
APA | Cui, Hui-Min,Wang, Lei,Fan, Dong-Rui,&Feng, Xiao-Bing.(2010).Landing Stencil Code on Godson-T.JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,25(4),886-894. |
MLA | Cui, Hui-Min,et al."Landing Stencil Code on Godson-T".JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY 25.4(2010):886-894. |
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