An efficient VLSI architecture for CBAC of AVS HDTV decoder

doi:10.1016/j.image.2008.12.007

	An efficient VLSI architecture for CBAC of AVS HDTV decoder
	Zheng, Junhao 1,2; Gao, Wen 3; Wu, David 4; Xie, Don 4
	2009-04-01
发表期刊	SIGNAL PROCESSING-IMAGE COMMUNICATION
ISSN	0923-5965
卷号	24 期号:4 页码:324-332
摘要	Context-based Binary Arithmetic Coding (CBAC) is a normative part of the newest X Profile of Advanced Audio Video coding Standard (AVS). This paper presents an efficient VLSI architecture for CBAC decoding in AVS. Compared with CBAC in H.264/AVC, the simpler binarization methods and context selection schemes are adopted in AVS. In order to avoid the slow multiplications, the traditional arithmetic calculation is transformed to the logarithm domain. Although these features can obtain better balance between the compression gain and implementation cost, it still brings huge challenge for high-throughput implementation. The fact that current bin decoding depends on previous bin results in long latency and limits overall system performance. In this paper, we present a software-hardware co-design by using bin distribution feature. A novel pipeline-based architecture is proposed where the arithmetic decoding engine works in parallel with the context maintainer. A finite state machine (FSM) is used to control the decoding procedure flexibly and the context scheduling is organized carefully to minimize the access times of context RAMs. In addition. the critical path is optimized for the timing. The proposed implementation can work at 150 MHz and achieve the real-time AVS CBAC decoding for 1080i HDTV video. (C) 2009 Elsevier B.V. All rights reserved.
关键词	CBAC AVS VLSI HDTV
DOI	10.1016/j.image.2008.12.007
收录类别	SCI
语种	英语
资助项目	Spreadtrum Communications (Shanghai) Co., Ltd
WOS研究方向	Engineering
WOS类目	Engineering, Electrical & Electronic
WOS记录号	WOS:000267039600008
出版者	ELSEVIER SCIENCE BV
引用统计	被引频次：3[WOS] [WOS记录] [WOS相关记录]
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/11537
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Zheng, Junhao
作者单位	1.Chinese Acad Sci, Inst Comp Technol, Beijing, Peoples R China 2.Grad Univ Chinese Acad Sci, Beijing, Peoples R China 3.Peking Univ, Inst Digital Media, Beijing 100871, Peoples R China 4.Spreadtrum Commun Inc, Shanghai, Peoples R China
推荐引用方式 GB/T 7714	Zheng, Junhao,Gao, Wen,Wu, David,et al. An efficient VLSI architecture for CBAC of AVS HDTV decoder[J]. SIGNAL PROCESSING-IMAGE COMMUNICATION,2009,24(4):324-332.
APA	Zheng, Junhao,Gao, Wen,Wu, David,&Xie, Don.(2009).An efficient VLSI architecture for CBAC of AVS HDTV decoder.SIGNAL PROCESSING-IMAGE COMMUNICATION,24(4),324-332.
MLA	Zheng, Junhao,et al."An efficient VLSI architecture for CBAC of AVS HDTV decoder".SIGNAL PROCESSING-IMAGE COMMUNICATION 24.4(2009):324-332.