Institute of Computing Technology, Chinese Academy IR
Design-for-Testability Features and Test Implementation of a Giga Hertz General Purpose Microprocessor | |
Wang, Da1,2; Hu, Yu1; Li, Hua-Wei1; Li, Xiao-Wei1 | |
2008-11-01 | |
发表期刊 | JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY
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ISSN | 1000-9000 |
卷号 | 23期号:6页码:1037-1046 |
摘要 | This paper describes the design-for-testability (DFT) features and low-cost testing solutions of a general purpose microprocessor. The optimized DFT features are presented in detail. A hybrid scan compression structure was executed and achieved compression ratio more than ten times. Memory built-in self-test (BIST) circuitries were designed with scan collars instead of bitmaps to reduce area overheads and to improve test and debug efficiency. The implemented DFT framework also utilized internal phase-locked loops (PLL) to provide complex at-speed test clock sequences. Since there are still limitations in this DFT design, the test strategies for this case are quite complex, with complicated automatic test pattern generation (ATPG) and debugging flow. The sample testing results are given in the paper. All the DFT methods discussed in the paper are prototypes for a high-volume manufacturing (HVM) DFT plan to meet high quality test goals as well as slow test power consumption and cost. |
关键词 | microprocessor design-for-testability test generation built-in self-test at-speed testing |
DOI | 10.1007/s11390-008-9193-0 |
收录类别 | SCI |
语种 | 英语 |
资助项目 | National Natural Science Foundation of China[60633060] ; National Natural Science Foundation of China[60606008] ; National Natural Science Foundation of China[60776031] ; National Natural Science Foundation of China[60803031] ; National Natural Science Foundation of China[90607010] ; National Basic Research 973 Program of China[2005CB321604] ; National Basic Research 973 Program of China[2005CB321605] ; National High Technology Research and Development 863 Program of China[2007AA01Z107] ; National High Technology Research and Development 863 Program of China[2007AA01Z113] ; National High Technology Research and Development 863 Program of China[2007AA01Z476] |
WOS研究方向 | Computer Science |
WOS类目 | Computer Science, Hardware & Architecture ; Computer Science, Software Engineering |
WOS记录号 | WOS:000261179300013 |
出版者 | SCIENCE PRESS |
引用统计 | |
文献类型 | 期刊论文 |
条目标识符 | http://119.78.100.204/handle/2XEOYT63/11405 |
专题 | 中国科学院计算技术研究所期刊论文_英文 |
通讯作者 | Li, Xiao-Wei |
作者单位 | 1.Chinese Acad Sci, Inst Comp Technol, Key Lab Comp Syst & Architecture, Beijing 100190, Peoples R China 2.Chinese Acad Sci, Grad Univ, Beijing 100049, Peoples R China |
推荐引用方式 GB/T 7714 | Wang, Da,Hu, Yu,Li, Hua-Wei,et al. Design-for-Testability Features and Test Implementation of a Giga Hertz General Purpose Microprocessor[J]. JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,2008,23(6):1037-1046. |
APA | Wang, Da,Hu, Yu,Li, Hua-Wei,&Li, Xiao-Wei.(2008).Design-for-Testability Features and Test Implementation of a Giga Hertz General Purpose Microprocessor.JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,23(6),1037-1046. |
MLA | Wang, Da,et al."Design-for-Testability Features and Test Implementation of a Giga Hertz General Purpose Microprocessor".JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY 23.6(2008):1037-1046. |
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