Leakage current optimization techniques during test based on don't care bits assignment

	Leakage current optimization techniques during test based on don't care bits assignment
	Wang, Wei ; Hu, Yu ; Han, Yin-He ; Li, Xiao-Wei ; Zhang, You-Sheng
	2007-09-01
发表期刊	JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY
ISSN	1000-9000
卷号	22 期号:5 页码:673-680
摘要	It is a well-known fact that test power consumption may exceed that during functional operation. Leakage power dissipation caused by leakage current in Complementary Metal-Oxide-Semiconductor (CMOS) circuits during test has become a significant part of the total power dissipation. Hence, it is important to reduce leakage power to prolong battery life in portable systems which employ periodic self-test, to increase test reliability and to reduce test cost. This paper analyzes leakage current and presents a kind of leakage current simulator based on the transistor stacking effect. Using it, we propose techniques based on don't care bits (denoted by Xs) in test vectors to optimize leakage current in integrated circuit (IC) test by genetic algorithm. The techniques identify a set of don't care inputs in given test vectors and reassign specified logic values to the X inputs by the genetic algorithm to get minimum leakage vector (MLV). Experimental results indicate that the techniques can effectually optimize leakage current of combinational circuits and sequential circuits during test while maintaining high fault coverage.
关键词	leakage current don't care bits minimum leakage vector leakage power
收录类别	SCI
语种	英语
WOS研究方向	Computer Science
WOS类目	Computer Science, Hardware & Architecture ; Computer Science, Software Engineering
WOS记录号	WOS:000250009300004
出版者	SCIENCE CHINA PRESS
引用统计	被引频次：2[WOS] [WOS记录] [WOS相关记录]
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/10826
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Wang, Wei
作者单位	1.Hefei Univ Technol, Sch Comp & Informat, Hefei, Peoples R China 2.Chinese Acad Sci, Comp Technol Inst, Key Lab Comp Syst & Architecture, Beijing 100080, Peoples R China
推荐引用方式 GB/T 7714	Wang, Wei,Hu, Yu,Han, Yin-He,et al. Leakage current optimization techniques during test based on don't care bits assignment[J]. JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,2007,22(5):673-680.
APA	Wang, Wei,Hu, Yu,Han, Yin-He,Li, Xiao-Wei,&Zhang, You-Sheng.(2007).Leakage current optimization techniques during test based on don't care bits assignment.JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,22(5),673-680.
MLA	Wang, Wei,et al."Leakage current optimization techniques during test based on don't care bits assignment".JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY 22.5(2007):673-680.